[PATCH] D122566: [AArch64] Set MaxBytesForLoopAlignment for more targets

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.cpp:82
   case CortexA35:
+    MaxBytesForLoopAlignment = 8;
     break;
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This needn't be set if there is no PrefLoopLogAlignment set too.

Either that, or it can be treated like a CortexA53/A55 below by adding it to the same case block.


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Comment at: llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes-neoverse.ll:9
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a75  < %s -o -| FileCheck %s --check-prefixes=CHECK,CHECK-8
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a510 < %s -o -| FileCheck %s --check-prefixes=CHECK,CHECK-8
 
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Should this be checking for 4, 8? Can we add some of the other cpus like A53 and A55 too?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122566/new/

https://reviews.llvm.org/D122566