[llvm] 27c1855 - [CSKY] Add missing codegen pattern for 16-bit instruction
Zi Xuan Wu via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 29 01:06:29 PDT 2022
Author: Zi Xuan Wu
Date: 2022-03-29T16:05:30+08:00
New Revision: 27c18558e6f156b193581e6326c386fe4d297159
URL: https://github.com/llvm/llvm-project/commit/27c18558e6f156b193581e6326c386fe4d297159
DIFF: https://github.com/llvm/llvm-project/commit/27c18558e6f156b193581e6326c386fe4d297159.diff
LOG: [CSKY] Add missing codegen pattern for 16-bit instruction
In generic cpu model, there are only low 16 registers and little 32-bit instruction. CK801 is the cpu
family with least basic features like generic model.
Add test run and check for generic cpu model in original test case to cover basic LLVM IR functionality.
Added:
llvm/test/CodeGen/CSKY/call-16bit.ll
Modified:
llvm/lib/Target/CSKY/CSKY.h
llvm/lib/Target/CSKY/CSKYInstrInfo.td
llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td
llvm/test/CodeGen/CSKY/base-i.ll
llvm/test/CodeGen/CSKY/br.ll
llvm/test/CodeGen/CSKY/cmp-i.ll
llvm/test/CodeGen/CSKY/cvt-i.ll
llvm/test/CodeGen/CSKY/ldst-i.ll
llvm/test/CodeGen/CSKY/select.ll
llvm/test/MC/CSKY/branch-relax-801.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/CSKY/CSKY.h b/llvm/lib/Target/CSKY/CSKY.h
index 6bc13b4a2fa64..27a6c6d2f2502 100644
--- a/llvm/lib/Target/CSKY/CSKY.h
+++ b/llvm/lib/Target/CSKY/CSKY.h
@@ -20,6 +20,7 @@
namespace llvm {
class CSKYTargetMachine;
class FunctionPass;
+class PassRegistry;
FunctionPass *createCSKYISelDag(CSKYTargetMachine &TM);
FunctionPass *createCSKYConstantIslandPass();
diff --git a/llvm/lib/Target/CSKY/CSKYInstrInfo.td b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
index e3edf8280c75c..28e364ce48743 100644
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -413,6 +413,19 @@ def psrflag : Operand<i32>, ImmLeaf<i32, "return isShiftedUInt<5, 0>(Imm);"> {
let PrintMethod = "printPSRFlag";
}
+multiclass uimm8SRLXForm<SDNode opc> {
+ def _0: SDNodeXForm<opc,
+ [{return CurDAG->getTargetConstant((N->getZExtValue() >> 0) & 0xFF, SDLoc(N), MVT::i32);}]>;
+ def _8: SDNodeXForm<opc,
+ [{return CurDAG->getTargetConstant((N->getZExtValue() >> 8) & 0xFF, SDLoc(N), MVT::i32);}]>;
+ def _16: SDNodeXForm<opc,
+ [{return CurDAG->getTargetConstant((N->getZExtValue() >> 16) & 0xFF, SDLoc(N), MVT::i32);}]>;
+ def _24: SDNodeXForm<opc,
+ [{return CurDAG->getTargetConstant((N->getZExtValue() >> 24) & 0xFF, SDLoc(N), MVT::i32);}]>;
+}
+
+defm uimm8SRL : uimm8SRLXForm<imm>;
+
//===----------------------------------------------------------------------===//
// Instruction Formats
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td b/llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td
index 6a9dd03dfa1d4..3be1ca8b79982 100644
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td
@@ -441,6 +441,137 @@ let mayLoad = 1, Size = 2, isCodeGenOnly = 0 in
def PseudoLRW16 : CSKYPseudo<(outs mGPR:$rz),
(ins bare_symbol:$src), "lrw16 $rz, $src", []>;
+//===----------------------------------------------------------------------===//
+// Instruction Patterns.
+//===----------------------------------------------------------------------===//
+
+def : Pat<(sext_inreg mGPR:$src, i1), (ASRI16 (LSLI16 mGPR:$src, 7), 7)>;
+def : Pat<(sext_inreg sGPR:$src, i8), (SEXTB16 sGPR:$src)>;
+def : Pat<(sext_inreg sGPR:$src, i16), (SEXTH16 sGPR:$src)>;
+
+// Load & Store Patterns
+
+defm : LdPat<extloadi8, uimm5, LD16B, i32>;
+defm : LdPat<zextloadi8, uimm5, LD16B, i32>;
+
+defm : LdPat<extloadi16, uimm5_1, LD16H, i32>;
+defm : LdPat<zextloadi16, uimm5_1, LD16H, i32>;
+
+defm : LdPat<load, uimm5_2, LD16W, i32>;
+
+
+defm : StPat<truncstorei8, i32, uimm5, ST16B>;
+defm : StPat<truncstorei16, i32, uimm5_1, ST16H>;
+defm : StPat<store, i32, uimm5_2, ST16W>;
+
+def : Pat<(CSKY_CALLReg sGPR:$src), (JSR16 sGPR:$src)>;
+def : Pat<(CSKY_TAILReg sGPR:$src), (JMP16 sGPR:$src)>;
+
+// Symbol address Patterns
+def : Pat<(CSKY_LOAD_ADDR tglobaladdr, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
+def : Pat<(CSKY_LOAD_ADDR tblockaddress, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
+def : Pat<(CSKY_LOAD_ADDR tjumptable:$src1, tconstpool:$src2), (LRW16_Gen tjumptable:$src1, tconstpool:$src2)>;
+def : Pat<(CSKY_LOAD_ADDR texternalsym, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
+
+def : Pat<(i32 (load constpool:$src)), (LRW16 (to_tconstpool tconstpool:$src))>;
+
+// Branch Patterns.
+
+def : Pat<(brcond CARRY:$ca, bb:$offset),
+ (BT16 CARRY:$ca, bb:$offset)>;
+
+def : Pat<(br bb:$offset), (BR16 bb:$offset)>;
+
+def : Pat<(brcond (i32 (setne mGPR:$rs1, uimm5:$rs2)), bb:$offset),
+ (BT16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (seteq mGPR:$rs1, uimm5:$rs2)), bb:$offset),
+ (BF16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setuge mGPR:$rs1, oimm5:$rs2)), bb:$offset),
+ (BT16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setult mGPR:$rs1, oimm5:$rs2)), bb:$offset),
+ (BF16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setlt mGPR:$rs1, oimm5:$rs2)), bb:$offset),
+ (BT16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setge mGPR:$rs1, oimm5:$rs2)), bb:$offset),
+ (BF16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
+
+def : Pat<(brcond (i32 (setne sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BT16 (CMPNE16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (seteq sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BF16 (CMPNE16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setuge sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BT16 (CMPHS16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setule sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BT16 (CMPHS16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
+def : Pat<(brcond (i32 (setult sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BF16 (CMPHS16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setugt sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BF16 (CMPHS16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
+def : Pat<(brcond (i32 (setlt sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BT16 (CMPLT16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setgt sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BT16 (CMPLT16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
+def : Pat<(brcond (i32 (setge sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BF16 (CMPLT16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
+def : Pat<(brcond (i32 (setle sGPR:$rs1, sGPR:$rs2)), bb:$offset),
+ (BF16 (CMPLT16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
+
+// Compare Patterns.
+def : Pat<(setne sGPR:$rs1, sGPR:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPNE16 sGPR:$rs1, sGPR:$rs2)))>;
+def : Pat<(seteq sGPR:$rs1, sGPR:$rs2),
+ (MVCV16 (CMPNE16 sGPR:$rs1, sGPR:$rs2))>;
+def : Pat<(setuge sGPR:$rs1, sGPR:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHS16 sGPR:$rs1, sGPR:$rs2)))>;
+def : Pat<(setule sGPR:$rs1, sGPR:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHS16 sGPR:$rs2, sGPR:$rs1)))>;
+def : Pat<(setult sGPR:$rs1, sGPR:$rs2),
+ (MVCV16 (CMPHS16 sGPR:$rs1, sGPR:$rs2))>;
+def : Pat<(setugt sGPR:$rs1, sGPR:$rs2),
+ (MVCV16 (CMPHS16 sGPR:$rs2, sGPR:$rs1))>;
+def : Pat<(setlt sGPR:$rs1, sGPR:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLT16 sGPR:$rs1, sGPR:$rs2)))>;
+def : Pat<(setgt sGPR:$rs1, sGPR:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLT16 sGPR:$rs2, sGPR:$rs1)))>;
+def : Pat<(setge sGPR:$rs1, sGPR:$rs2),
+ (MVCV16 (CMPLT16 sGPR:$rs1, sGPR:$rs2))>;
+def : Pat<(setle sGPR:$rs1, sGPR:$rs2),
+ (MVCV16 (CMPLT16 sGPR:$rs2, sGPR:$rs1))>;
+
+
+def : Pat<(setne mGPR:$rs1, uimm5:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2)))>;
+def : Pat<(seteq mGPR:$rs1, uimm5:$rs2),
+ (MVCV16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2))>;
+def : Pat<(setuge mGPR:$rs1, oimm5:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2)))>;
+def : Pat<(setult mGPR:$rs1, oimm5:$rs2),
+ (MVCV16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2))>;
+def : Pat<(setlt mGPR:$rs1, oimm5:$rs2),
+ (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2)))>;
+def : Pat<(setge mGPR:$rs1, oimm5:$rs2),
+ (MVCV16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2))>;
+
+def : Pat<(select CARRY:$ca, sGPR:$rx, sGPR:$false),
+ (ISEL16 CARRY:$ca, sGPR:$rx, sGPR:$false)>;
+def : Pat<(select (and CARRY:$ca, 1), sGPR:$rx, sGPR:$false),
+ (ISEL16 CARRY:$ca, sGPR:$rx, sGPR:$false)>;
+
+def : Pat<(rotl sGPR:$rs1, sGPR:$rs2),
+ (ROTL16 sGPR:$rs1, (AND16 sGPR:$rs2, (MOVI16 0x1f)))>;
+
+
+// FIXME: This is a temporary treatment for the e801.
+def : Pat<(i32 imm:$imm),
+ (OR16 (MOVI16 (uimm8SRL_0 imm:$imm)),
+ (OR16 (LSLI16 (MOVI16 (uimm8SRL_8 imm:$imm)), 8),
+ (OR16 (LSLI16 (MOVI16 (uimm8SRL_16 imm:$imm)), 16),
+ (LSLI16 (MOVI16 (uimm8SRL_24 imm:$imm)), 24))))>;
+
+// Other operations.
+let Predicates = [iHasE2] in {
+ def : Pat<(bswap sGPR:$rx), (REVB16 sGPR:$rx)>;
+}
//===----------------------------------------------------------------------===//
// Compress Instruction tablegen backend.
diff --git a/llvm/test/CodeGen/CSKY/base-i.ll b/llvm/test/CodeGen/CSKY/base-i.ll
index c630ac7eae222..dcae93e663946 100644
--- a/llvm/test/CodeGen/CSKY/base-i.ll
+++ b/llvm/test/CodeGen/CSKY/base-i.ll
@@ -1,11 +1,21 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
define i32 @addRR(i32 %x, i32 %y) {
; CHECK-LABEL: addRR:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: addRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i32 %y, %x
ret i32 %add
@@ -16,6 +26,15 @@ define i32 @addRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi16 a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: addRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 a0, 10
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i32 %x, 10
ret i32 %add
@@ -27,6 +46,24 @@ define i32 @addRI_X(i32 %x) {
; CHECK-NEXT: movi32 a1, 4097
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: addRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i32 %x, 4097
ret i32 %add
@@ -39,6 +76,17 @@ define i64 @ADD_LONG(i64 %x, i64 %y) {
; CHECK-NEXT: addc32 a0, a2, a0
; CHECK-NEXT: addc32 a1, a3, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ADD_LONG:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: clrc16
+; GENERIC-NEXT: addc16 a0, a2
+; GENERIC-NEXT: addc16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i64 %y, %x
ret i64 %add
@@ -53,6 +101,19 @@ define i64 @ADD_LONG_I(i64 %x) {
; CHECK-NEXT: movi16 a2, 0
; CHECK-NEXT: addc16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ADD_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: clrc16
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: addc16 a0, a2
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: addc16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i64 %x, 1
ret i64 %add
@@ -63,6 +124,15 @@ define i16 @ADD_SHORT(i16 %x, i16 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ADD_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i16 %y, %x
ret i16 %add
@@ -73,6 +143,15 @@ define i16 @ADD_SHORT_I(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ADD_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i16 %x, 1
ret i16 %add
@@ -83,6 +162,15 @@ define i8 @ADD_CHAR(i8 %x, i8 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ADD_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i8 %y, %x
ret i8 %add
@@ -93,6 +181,15 @@ define i8 @ADD_CHAR_I(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ADD_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%add = add nsw i8 %x, 1
ret i8 %add
@@ -104,6 +201,15 @@ define i32 @subRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subu16 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: subRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: subu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i32 %y, %x
ret i32 %sub
@@ -116,6 +222,23 @@ define i32 @subRI(i32 %x) {
; CHECK-NEXT: ori32 a1, a1, 65526
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: subRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a3
+; GENERIC-NEXT: movi16 a2, 246
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: addu16 a0, a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i32 %x, 10
ret i32 %sub
@@ -128,6 +251,23 @@ define i32 @subRI_X(i32 %x) {
; CHECK-NEXT: ori32 a1, a1, 61439
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: subRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: movi16 a2, 239
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: addu16 a0, a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i32 %x, 4097
ret i32 %sub
@@ -144,6 +284,23 @@ define i64 @SUB_LONG(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: subc32 a1, a3, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SUB_LONG:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: setc16
+; GENERIC-NEXT: subc16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: subc16 a3, a1
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i64 %y, %x
ret i64 %sub
@@ -158,6 +315,29 @@ define i64 @SUB_LONG_I(i64 %x) {
; CHECK-NEXT: addc16 a0, a2
; CHECK-NEXT: addc16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SUB_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: clrc16
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 l0, a2, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: addc16 a0, a3
+; GENERIC-NEXT: addc16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i64 %x, 1
ret i64 %sub
@@ -168,6 +348,15 @@ define i16 @SUB_SHORT(i16 %x, i16 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subu16 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SUB_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: subu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i16 %y, %x
ret i16 %sub
@@ -180,6 +369,22 @@ define i16 @SUB_SHORT_I(i16 %x) {
; CHECK-NEXT: ori32 a1, a1, 65535
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SUB_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a2, a1, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: addu16 a0, a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i16 %x, 1
ret i16 %sub
@@ -190,6 +395,15 @@ define i8 @SUB_CHAR(i8 %x, i8 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subu16 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SUB_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: subu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i8 %y, %x
ret i8 %sub
@@ -202,6 +416,22 @@ define i8 @SUB_CHAR_I(i8 %x) {
; CHECK-NEXT: ori32 a1, a1, 65535
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SUB_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a2, a1, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: addu16 a0, a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sub = sub nsw i8 %x, 1
ret i8 %sub
@@ -212,6 +442,15 @@ define i32 @mulRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: mulRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i32 %y, %x
ret i32 %mul
@@ -223,6 +462,16 @@ define i32 @mulRI(i32 %x) {
; CHECK-NEXT: movi16 a1, 10
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: mulRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i32 %x, 10
ret i32 %mul
@@ -234,6 +483,24 @@ define i32 @mulRI_X(i32 %x) {
; CHECK-NEXT: movi32 a1, 4097
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: mulRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i32 %x, 4097
ret i32 %mul
@@ -244,6 +511,15 @@ define i16 @MUL_SHORT(i16 %x, i16 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: MUL_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i16 %y, %x
ret i16 %mul
@@ -255,6 +531,16 @@ define i16 @MUL_SHORT_I(i16 %x) {
; CHECK-NEXT: movi16 a1, 3
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: MUL_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 3
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i16 %x, 3
ret i16 %mul
@@ -265,6 +551,15 @@ define i8 @MUL_CHAR(i8 %x, i8 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: MUL_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i8 %y, %x
ret i8 %mul
@@ -277,6 +572,23 @@ define i8 @MUL_CHAR_I(i8 %x) {
; CHECK-NEXT: ori32 a1, a1, 65533
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: MUL_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a3
+; GENERIC-NEXT: movi16 a2, 253
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: mult16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%mul = mul nsw i8 %x, -3
ret i8 %mul
@@ -287,6 +599,29 @@ define i32 @udivRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: divu32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: udivRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: mov16 a2, a0
+; GENERIC-NEXT: lrw32 a3, [.LCPI25_0]
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: jsr16 a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI25_0:
+; GENERIC-NEXT: .long __udivsi3
entry:
%udiv = udiv i32 %y, %x
ret i32 %udiv
@@ -298,6 +633,27 @@ define i32 @udivRI(i32 %x) {
; CHECK-NEXT: movi16 a1, 10
; CHECK-NEXT: divu32 a0, a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: udivRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: lrw32 a2, [.LCPI26_0]
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: jsr16 a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI26_0:
+; GENERIC-NEXT: .long __udivsi3
entry:
%udiv = udiv i32 %x, 10
ret i32 %udiv
@@ -309,6 +665,35 @@ define i32 @udivRI_X(i32 %x) {
; CHECK-NEXT: movi32 a1, 4097
; CHECK-NEXT: divu32 a0, a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: udivRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: lrw32 a2, [.LCPI27_0]
+; GENERIC-NEXT: jsr16 a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI27_0:
+; GENERIC-NEXT: .long __udivsi3
entry:
%udiv = udiv i32 %x, 4097
ret i32 %udiv
@@ -321,6 +706,41 @@ define i16 @UDIV_SHORT(i16 %x, i16 %y) {
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: divu32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: UDIV_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: .cfi_offset lr, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a3, a1, 24
+; GENERIC-NEXT: lsli16 l0, a1, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 a1, a3, 8
+; GENERIC-NEXT: or16 a1, l0
+; GENERIC-NEXT: or16 a1, a3
+; GENERIC-NEXT: and16 a2, a1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: lrw32 a3, [.LCPI28_0]
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: jsr16 a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI28_0:
+; GENERIC-NEXT: .long __udivsi3
entry:
%udiv = udiv i16 %y, %x
ret i16 %udiv
@@ -334,6 +754,30 @@ define i16 @UDIV_SHORT_I(i16 %x) {
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: lsri16 a0, a0, 17
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: UDIV_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 170
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: movi16 a1, 171
+; GENERIC-NEXT: or16 a1, a0
+; GENERIC-NEXT: mult16 a1, a3
+; GENERIC-NEXT: lsri16 a0, a1, 17
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%udiv = udiv i16 %x, 3
ret i16 %udiv
@@ -346,6 +790,31 @@ define i8 @UDIV_CHAR(i8 %x, i8 %y) {
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: divu32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: UDIV_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a2, a1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: lrw32 a3, [.LCPI30_0]
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: jsr16 a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI30_0:
+; GENERIC-NEXT: .long __udivsi3
entry:
%udiv = udiv i8 %y, %x
ret i8 %udiv
@@ -359,6 +828,19 @@ define i8 @UDIV_CHAR_I(i8 %x) {
; CHECK-NEXT: mult16 a0, a1
; CHECK-NEXT: lsri16 a0, a0, 9
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: UDIV_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: movi16 a0, 171
+; GENERIC-NEXT: mult16 a0, a1
+; GENERIC-NEXT: lsri16 a0, a0, 9
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%udiv = udiv i8 %x, 3
ret i8 %udiv
@@ -369,6 +851,29 @@ define i32 @sdivRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: divs32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sdivRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: mov16 a2, a0
+; GENERIC-NEXT: lrw32 a3, [.LCPI32_0]
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: jsr16 a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI32_0:
+; GENERIC-NEXT: .long __divsi3
entry:
%sdiv = sdiv i32 %y, %x
ret i32 %sdiv
@@ -380,6 +885,27 @@ define i32 @sdivRI(i32 %x) {
; CHECK-NEXT: movi16 a1, 10
; CHECK-NEXT: divs32 a0, a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sdivRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: lrw32 a2, [.LCPI33_0]
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: jsr16 a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI33_0:
+; GENERIC-NEXT: .long __divsi3
entry:
%sdiv = sdiv i32 %x, 10
ret i32 %sdiv
@@ -391,6 +917,35 @@ define i32 @sdivRI_X(i32 %x) {
; CHECK-NEXT: movi32 a1, 4097
; CHECK-NEXT: divs32 a0, a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sdivRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: lrw32 a2, [.LCPI34_0]
+; GENERIC-NEXT: jsr16 a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI34_0:
+; GENERIC-NEXT: .long __divsi3
entry:
%sdiv = sdiv i32 %x, 4097
ret i32 %sdiv
@@ -403,6 +958,29 @@ define i16 @SDIV_SHORT(i16 %x, i16 %y) {
; CHECK-NEXT: sexth16 a1, a1
; CHECK-NEXT: divs32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SDIV_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sexth16 a2, a1
+; GENERIC-NEXT: sexth16 a1, a0
+; GENERIC-NEXT: lrw32 a3, [.LCPI35_0]
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: jsr16 a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI35_0:
+; GENERIC-NEXT: .long __divsi3
entry:
%sdiv = sdiv i16 %y, %x
ret i16 %sdiv
@@ -418,6 +996,28 @@ define i16 @SDIV_SHORT_I(i16 %x) {
; CHECK-NEXT: lsri16 a0, a0, 16
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SDIV_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 85
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 86
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: mult16 a1, a0
+; GENERIC-NEXT: lsri16 a0, a1, 31
+; GENERIC-NEXT: lsri16 a1, a1, 16
+; GENERIC-NEXT: addu16 a0, a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sdiv = sdiv i16 %x, 3
ret i16 %sdiv
@@ -430,6 +1030,29 @@ define i8 @SDIV_CHAR(i8 %x, i8 %y) {
; CHECK-NEXT: sextb16 a1, a1
; CHECK-NEXT: divs32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SDIV_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset lr, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sextb16 a2, a1
+; GENERIC-NEXT: sextb16 a1, a0
+; GENERIC-NEXT: lrw32 a3, [.LCPI37_0]
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: jsr16 a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .p2align 1
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: .p2align 2
+; GENERIC-NEXT: .LCPI37_0:
+; GENERIC-NEXT: .long __divsi3
entry:
%sdiv = sdiv i8 %y, %x
ret i8 %sdiv
@@ -449,6 +1072,25 @@ define i8 @SDIV_CHAR_I(i8 %x) {
; CHECK-NEXT: asri16 a0, a0, 1
; CHECK-NEXT: addu16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SDIV_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a0
+; GENERIC-NEXT: movi16 a2, 85
+; GENERIC-NEXT: mult16 a2, a1
+; GENERIC-NEXT: lsri16 a1, a2, 8
+; GENERIC-NEXT: subu16 a0, a1, a0
+; GENERIC-NEXT: movi16 a1, 128
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: lsri16 a1, a1, 7
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: asri16 a0, a0, 1
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sdiv = sdiv i8 %x, -3
ret i8 %sdiv
@@ -459,6 +1101,16 @@ define i32 @shlRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lsl32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: shlRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsl16 a1, a0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i32 %y, %x
ret i32 %shl
@@ -469,6 +1121,15 @@ define i32 @shlRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lsli16 a0, a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: shlRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 10
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i32 %x, 10
ret i32 %shl
@@ -483,6 +1144,18 @@ define i64 @SHL_LONG_I(i64 %x) {
; CHECK-NEXT: or16 a1, a2
; CHECK-NEXT: lsli16 a0, a0, 7
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SHL_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsri16 a2, a0, 25
+; GENERIC-NEXT: lsli16 a1, a1, 7
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i64 %x, 7
ret i64 %shl
@@ -494,6 +1167,30 @@ define i16 @SHL_SHORT(i16 %x, i16 %y) {
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: lsl32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SHL_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: lsl16 a1, l0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i16 %y, %x
ret i16 %shl
@@ -504,6 +1201,15 @@ define i16 @SHL_SHORT_I(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lsli16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SHL_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i16 %x, 1
ret i16 %shl
@@ -515,6 +1221,18 @@ define i8 @SHL_CHAR(i8 %x, i8 %y) {
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: lsl32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SHL_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a2, a0
+; GENERIC-NEXT: lsl16 a1, a2
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i8 %y, %x
ret i8 %shl
@@ -525,6 +1243,15 @@ define i8 @SHL_CHAR_I(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lsli16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: SHL_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%shl = shl nsw i8 %x, 1
ret i8 %shl
@@ -535,6 +1262,15 @@ define i32 @andRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: andRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i32 %y, %x
ret i32 %and
@@ -545,6 +1281,16 @@ define i32 @andRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: andRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i32 %x, 10
ret i32 %and
@@ -556,6 +1302,24 @@ define i32 @andRI_X(i32 %x) {
; CHECK-NEXT: movi32 a1, 4097
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: andRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i32 %x, 4097
ret i32 %and
@@ -567,6 +1331,16 @@ define i64 @AND_LONG(i64 %x, i64 %y) {
; CHECK-NEXT: and16 a0, a2
; CHECK-NEXT: and16 a1, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: AND_LONG:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i64 %y, %x
ret i64 %and
@@ -578,6 +1352,17 @@ define i64 @AND_LONG_I(i64 %x) {
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: AND_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i64 %x, 1
ret i64 %and
@@ -588,6 +1373,15 @@ define i16 @AND_SHORT(i16 %x, i16 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: AND_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i16 %y, %x
ret i16 %and
@@ -598,6 +1392,16 @@ define i16 @AND_SHORT_I(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: AND_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i16 %x, 1
ret i16 %and
@@ -608,6 +1412,15 @@ define i8 @AND_CHAR(i8 %x, i8 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: AND_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i8 %y, %x
ret i8 %and
@@ -618,6 +1431,16 @@ define i8 @AND_CHAR_I(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: AND_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%and = and i8 %x, 1
ret i8 %and
@@ -628,6 +1451,16 @@ define i32 @ashrRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: asr32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ashrRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: asr16 a1, a0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i32 %y, %x
ret i32 %ashr
@@ -638,6 +1471,15 @@ define i32 @ashrRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: asri16 a0, a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ashrRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: asri16 a0, a0, 10
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i32 %x, 10
ret i32 %ashr
@@ -652,6 +1494,18 @@ define i64 @ASHR_LONG_I(i64 %x) {
; CHECK-NEXT: or16 a0, a2
; CHECK-NEXT: asri16 a1, a1, 7
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ASHR_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a2, a1, 25
+; GENERIC-NEXT: lsri16 a0, a0, 7
+; GENERIC-NEXT: or16 a0, a2
+; GENERIC-NEXT: asri16 a1, a1, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i64 %x, 7
ret i64 %ashr
@@ -664,6 +1518,31 @@ define i16 @ASHR_SHORT(i16 %x, i16 %y) {
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: asr32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ASHR_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: asr16 a1, l0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i16 %y, %x
ret i16 %ashr
@@ -675,6 +1554,16 @@ define i16 @ASHR_SHORT_I(i16 %x) {
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: asri16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ASHR_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: asri16 a0, a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i16 %x, 1
ret i16 %ashr
@@ -687,6 +1576,19 @@ define i8 @ASHR_CHAR(i8 %x, i8 %y) {
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: asr32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ASHR_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a2, a0
+; GENERIC-NEXT: asr16 a1, a2
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i8 %y, %x
ret i8 %ashr
@@ -698,6 +1600,16 @@ define i8 @ASHR_CHAR_I(i8 %x) {
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: asri16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ASHR_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: asri16 a0, a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ashr = ashr i8 %x, 1
ret i8 %ashr
@@ -709,6 +1621,16 @@ define i32 @lshrRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lsr32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: lshrRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsr16 a1, a0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i32 %y, %x
ret i32 %lshr
@@ -719,6 +1641,15 @@ define i32 @lshrRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lsri16 a0, a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: lshrRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsri16 a0, a0, 10
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i32 %x, 10
ret i32 %lshr
@@ -732,6 +1663,18 @@ define i64 @LSHR_LONG_I(i64 %x) {
; CHECK-NEXT: or16 a0, a2
; CHECK-NEXT: lsri16 a1, a1, 7
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a2, a1, 25
+; GENERIC-NEXT: lsri16 a0, a0, 7
+; GENERIC-NEXT: or16 a0, a2
+; GENERIC-NEXT: lsri16 a1, a1, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i64 %x, 7
ret i64 %lshr
@@ -744,6 +1687,31 @@ define i16 @LSHR_SHORT(i16 %x, i16 %y) {
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: lsr32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: lsr16 a1, l0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i16 %y, %x
ret i16 %lshr
@@ -756,6 +1724,25 @@ define i16 @LSHR_SHORT_I(i16 %x) {
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: lsri16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 254
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: lsri16 a0, a1, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i16 %x, 1
ret i16 %lshr
@@ -768,6 +1755,19 @@ define i8 @LSHR_CHAR(i8 %x, i8 %y) {
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: lsr32 a0, a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: lsr16 a1, a0
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i8 %y, %x
ret i8 %lshr
@@ -779,6 +1779,17 @@ define i8 @LSHR_CHAR_I(i8 %x) {
; CHECK-NEXT: andi32 a0, a0, 254
; CHECK-NEXT: lsri16 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 254
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: lsri16 a0, a1, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i8 %x, 1
ret i8 %lshr
@@ -789,6 +1800,15 @@ define i1 @LSHR_BIT(i1 %x, i1 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_BIT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i1 %y, %x
ret i1 %lshr
@@ -798,6 +1818,14 @@ define i1 @LSHR_BIT_I(i1 %x) {
; CHECK-LABEL: LSHR_BIT_I:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: LSHR_BIT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%lshr = lshr i1 %x, 1
ret i1 %lshr
@@ -808,6 +1836,15 @@ define i32 @orRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: orRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i32 %y, %x
ret i32 %or
@@ -818,6 +1855,16 @@ define i32 @orRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori32 a0, a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: orRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i32 %x, 10
ret i32 %or
@@ -828,6 +1875,24 @@ define i32 @orRI_X(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori32 a0, a0, 4097
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: orRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i32 %x, 4097
ret i32 %or
@@ -839,6 +1904,16 @@ define i64 @OR_LONG(i64 %x, i64 %y) {
; CHECK-NEXT: or16 a0, a2
; CHECK-NEXT: or16 a1, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: OR_LONG:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a2
+; GENERIC-NEXT: or16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i64 %y, %x
ret i64 %or
@@ -849,6 +1924,16 @@ define i64 @OR_LONG_I(i64 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: OR_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: or16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i64 %x, 1
ret i64 %or
@@ -859,6 +1944,15 @@ define i16 @OR_SHORT(i16 %x, i16 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: OR_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i16 %y, %x
ret i16 %or
@@ -869,6 +1963,16 @@ define i16 @OR_SHORT_I(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: OR_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i16 %x, 1
ret i16 %or
@@ -879,6 +1983,15 @@ define i8 @OR_CHAR(i8 %x, i8 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: OR_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i8 %y, %x
ret i8 %or
@@ -889,6 +2002,16 @@ define i8 @OR_CHAR_I(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: OR_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%or = or i8 %x, 1
ret i8 %or
@@ -900,6 +2023,15 @@ define i32 @xorRR(i32 %x, i32 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: xorRR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i32 %y, %x
ret i32 %xor
@@ -910,6 +2042,16 @@ define i32 @xorRI(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 10
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: xorRI:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i32 %x, 10
ret i32 %xor
@@ -921,6 +2063,24 @@ define i32 @xorRI_X(i32 %x) {
; CHECK-NEXT: movi32 a1, 4097
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: xorRI_X:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 16
+; GENERIC-NEXT: lsli16 a2, a2, 8
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i32 %x, 4097
ret i32 %xor
@@ -932,6 +2092,16 @@ define i64 @XOR_LONG(i64 %x, i64 %y) {
; CHECK-NEXT: xor16 a0, a2
; CHECK-NEXT: xor16 a1, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: XOR_LONG:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i64 %y, %x
ret i64 %xor
@@ -942,6 +2112,16 @@ define i64 @XOR_LONG_I(i64 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: XOR_LONG_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i64 %x, 1
ret i64 %xor
@@ -952,6 +2132,15 @@ define i16 @XOR_SHORT(i16 %x, i16 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: XOR_SHORT:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i16 %y, %x
ret i16 %xor
@@ -962,6 +2151,16 @@ define i16 @XOR_SHORT_I(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: XOR_SHORT_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i16 %x, 1
ret i16 %xor
@@ -972,6 +2171,15 @@ define i8 @XOR_CHAR(i8 %x, i8 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: XOR_CHAR:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i8 %y, %x
ret i8 %xor
@@ -982,6 +2190,16 @@ define i8 @XOR_CHAR_I(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: XOR_CHAR_I:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%xor = xor i8 %x, 1
ret i8 %xor
@@ -992,6 +2210,14 @@ define i32 @truncR_i64_0(i64 %x) {
; CHECK-LABEL: truncR_i64_0:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i64_0:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i64 %x to i32
ret i32 %trunc
@@ -1001,6 +2227,14 @@ define i16 @truncR_i64_1(i64 %x) {
; CHECK-LABEL: truncR_i64_1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i64_1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i64 %x to i16
ret i16 %trunc
@@ -1010,6 +2244,14 @@ define i8 @truncR_i64_2(i64 %x) {
; CHECK-LABEL: truncR_i64_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i64_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i64 %x to i8
ret i8 %trunc
@@ -1019,6 +2261,14 @@ define i1 @truncR_i64_3(i64 %x) {
; CHECK-LABEL: truncR_i64_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i64_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i64 %x to i1
ret i1 %trunc
@@ -1030,6 +2280,14 @@ define i16 @truncR_i32_1(i32 %x) {
; CHECK-LABEL: truncR_i32_1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i32_1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i32 %x to i16
ret i16 %trunc
@@ -1039,6 +2297,14 @@ define i8 @truncR_i32_2(i32 %x) {
; CHECK-LABEL: truncR_i32_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i32_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i32 %x to i8
ret i8 %trunc
@@ -1048,6 +2314,14 @@ define i1 @truncR_i32_3(i32 %x) {
; CHECK-LABEL: truncR_i32_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i32_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i32 %x to i1
ret i1 %trunc
@@ -1058,6 +2332,14 @@ define i8 @truncR_i16_2(i16 %x) {
; CHECK-LABEL: truncR_i16_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i16_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i16 %x to i8
ret i8 %trunc
@@ -1067,6 +2349,14 @@ define i1 @truncR_i16_3(i16 %x) {
; CHECK-LABEL: truncR_i16_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i16_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i16 %x to i1
ret i1 %trunc
@@ -1078,6 +2368,14 @@ define i1 @truncR_i8_3(i8 %x) {
; CHECK-LABEL: truncR_i8_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: truncR_i8_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%trunc = trunc i8 %x to i1
ret i1 %trunc
diff --git a/llvm/test/CodeGen/CSKY/br.ll b/llvm/test/CodeGen/CSKY/br.ll
index 35f9a4febbd0b..a55299993e295 100644
--- a/llvm/test/CodeGen/CSKY/br.ll
+++ b/llvm/test/CodeGen/CSKY/br.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
;EQ
define i32 @brRR_eq(i32 %x, i32 %y) {
@@ -13,6 +14,22 @@ define i32 @brRR_eq(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB0_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: bt16 .LBB0_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB0_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -33,6 +50,22 @@ define i32 @brRI_eq(i32 %x) {
; CHECK-NEXT: .LBB1_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 10
+; GENERIC-NEXT: bt16 .LBB1_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB1_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -52,6 +85,22 @@ define i32 @brR0_eq(i32 %x) {
; CHECK-NEXT: .LBB2_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB2_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB2_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -73,6 +122,22 @@ define i32 @brRR_ne(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB3_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: bf16 .LBB3_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB3_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -93,6 +158,22 @@ define i32 @brRI_ne(i32 %x) {
; CHECK-NEXT: .LBB4_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 10
+; GENERIC-NEXT: bf16 .LBB4_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB4_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -112,6 +193,22 @@ define i32 @brR0_ne(i32 %x) {
; CHECK-NEXT: .LBB5_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB5_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB5_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -133,6 +230,22 @@ define i32 @brRR_ugt(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB6_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bt16 .LBB6_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB6_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -155,6 +268,22 @@ define i32 @brRI_ugt(i32 %x) {
; CHECK-NEXT: .LBB7_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: bf16 .LBB7_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB7_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -176,6 +305,22 @@ define i32 @brR0_ugt(i32 %x) {
; CHECK-NEXT: .LBB8_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB8_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB8_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -199,6 +344,22 @@ define i32 @brRR_uge(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB9_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bf16 .LBB9_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB9_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -221,6 +382,22 @@ define i32 @brRI_uge(i32 %x) {
; CHECK-NEXT: .LBB10_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: bf16 .LBB10_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB10_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -244,6 +421,22 @@ define i32 @brRR_ult(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB11_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bt16 .LBB11_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB11_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -267,6 +460,23 @@ define i32 @brRI_ult(i32 %x) {
; CHECK-NEXT: .LBB12_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 9
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bf16 .LBB12_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB12_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -291,6 +501,22 @@ define i32 @brRR_ule(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB13_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bf16 .LBB13_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB13_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -314,6 +540,23 @@ define i32 @brRI_ule(i32 %x) {
; CHECK-NEXT: .LBB14_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bf16 .LBB14_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB14_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -335,6 +578,22 @@ define i32 @brR0_ule(i32 %x) {
; CHECK-NEXT: .LBB15_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bt16 .LBB15_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB15_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -358,6 +617,22 @@ define i32 @brRR_sgt(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB16_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bf16 .LBB16_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB16_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -380,6 +655,22 @@ define i32 @brRI_sgt(i32 %x) {
; CHECK-NEXT: .LBB17_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: bt16 .LBB17_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB17_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -402,6 +693,22 @@ define i32 @brR0_sgt(i32 %x) {
; CHECK-NEXT: .LBB18_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 1
+; GENERIC-NEXT: bt16 .LBB18_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB18_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -425,6 +732,22 @@ define i32 @brRR_sge(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB19_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB19_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB19_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -447,6 +770,22 @@ define i32 @brRI_sge(i32 %x) {
; CHECK-NEXT: .LBB20_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: bt16 .LBB20_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB20_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -468,6 +807,23 @@ define i32 @brR0_sge(i32 %x) {
; CHECK-NEXT: .LBB21_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB21_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB21_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -491,6 +847,22 @@ define i32 @brRR_slt(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB22_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bf16 .LBB22_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB22_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -514,6 +886,23 @@ define i32 @brRI_slt(i32 %x) {
; CHECK-NEXT: .LBB23_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 9
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB23_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB23_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -538,6 +927,29 @@ define i32 @brR0_slt(i32 %x) {
; CHECK-NEXT: .LBB24_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a2, a1, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a2, a0
+; GENERIC-NEXT: bf16 .LBB24_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB24_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -561,6 +973,22 @@ define i32 @brRR_sle(i32 %x, i32 %y) {
; CHECK-NEXT: .LBB25_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB25_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB25_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -584,6 +1012,23 @@ define i32 @brRI_sle(i32 %x) {
; CHECK-NEXT: .LBB26_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB26_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB26_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -605,6 +1050,23 @@ define i32 @brR0_sle(i32 %x) {
; CHECK-NEXT: .LBB27_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB27_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB27_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -628,6 +1090,24 @@ define i32 @brCBit(i1 %c) {
; CHECK-NEXT: .LBB28_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brCBit:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB28_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB28_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
br i1 %c, label %label1, label %label2
label1:
@@ -653,6 +1133,26 @@ define i64 @brRR_i64_eq(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bt16 .LBB29_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB29_3
+; GENERIC-NEXT: .LBB29_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB29_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -676,6 +1176,26 @@ define i64 @brR0_i64_eq(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 10
+; GENERIC-NEXT: xor16 a2, a0
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmpnei16 a2, 0
+; GENERIC-NEXT: bt16 .LBB30_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB30_3
+; GENERIC-NEXT: .LBB30_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB30_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -698,6 +1218,24 @@ define i64 @brRI_i64_eq(i64 %x) {
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB31_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: br32 .LBB31_3
+; GENERIC-NEXT: .LBB31_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: .LBB31_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -723,6 +1261,26 @@ define i64 @brRR_i64_ne(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB32_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB32_3
+; GENERIC-NEXT: .LBB32_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB32_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -746,6 +1304,26 @@ define i64 @brRI_i64_ne(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 10
+; GENERIC-NEXT: xor16 a2, a0
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmpnei16 a2, 0
+; GENERIC-NEXT: bf16 .LBB33_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB33_3
+; GENERIC-NEXT: .LBB33_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB33_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -768,6 +1346,24 @@ define i64 @brR0_i64_ne(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB34_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB34_3
+; GENERIC-NEXT: .LBB34_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB34_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -813,6 +1409,46 @@ define i64 @brRR_i64_ugt(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: cmphs16 a1, a3
+; GENERIC-NEXT: mvcv16 l1
+; GENERIC-NEXT: movi16 l0, 1
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB35_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 l0, l1
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bf16 .LBB35_4
+; GENERIC-NEXT: .LBB35_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: br32 .LBB35_5
+; GENERIC-NEXT: .LBB35_3:
+; GENERIC-NEXT: subu16 l0, a0
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bt16 .LBB35_2
+; GENERIC-NEXT: .LBB35_4: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: .LBB35_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -850,6 +1486,32 @@ define i64 @brRI_i64_ugt(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB36_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB36_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB36_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB36_5
+; GENERIC-NEXT: .LBB36_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB36_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -874,6 +1536,24 @@ define i64 @brR0_i64_ugt(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bf16 .LBB37_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB37_3
+; GENERIC-NEXT: .LBB37_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB37_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -913,6 +1593,39 @@ define i64 @brRR_i64_uge(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmphs16 a3, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB38_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, l0
+; GENERIC-NEXT: .LBB38_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB38_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB38_5
+; GENERIC-NEXT: .LBB38_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB38_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -950,6 +1663,32 @@ define i64 @brRI_i64_uge(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB39_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB39_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB39_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB39_5
+; GENERIC-NEXT: .LBB39_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB39_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -997,6 +1736,46 @@ define i64 @brRR_i64_ult(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: cmphs16 a3, a1
+; GENERIC-NEXT: mvcv16 l1
+; GENERIC-NEXT: movi16 l0, 1
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB40_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 l0, l1
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bf16 .LBB40_4
+; GENERIC-NEXT: .LBB40_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: br32 .LBB40_5
+; GENERIC-NEXT: .LBB40_3:
+; GENERIC-NEXT: subu16 l0, a0
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bt16 .LBB40_2
+; GENERIC-NEXT: .LBB40_4: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: .LBB40_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1027,6 +1806,34 @@ define i64 @brRI_i64_ult(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a2, 9
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB41_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: .LBB41_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB41_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB41_5
+; GENERIC-NEXT: .LBB41_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB41_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1067,6 +1874,39 @@ define i64 @brRR_i64_ule(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmphs16 a1, a3
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB42_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, l0
+; GENERIC-NEXT: .LBB42_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB42_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB42_5
+; GENERIC-NEXT: .LBB42_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB42_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1097,6 +1937,34 @@ define i64 @brRI_i64_ule(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a2, 10
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB43_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: .LBB43_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB43_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB43_5
+; GENERIC-NEXT: .LBB43_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB43_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1121,6 +1989,24 @@ define i64 @brR0_i64_ule(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: bt16 .LBB44_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB44_3
+; GENERIC-NEXT: .LBB44_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB44_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1164,6 +2050,35 @@ define i64 @brRR_i64_sgt(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmplt16 a1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB45_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB45_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB45_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB45_5
+; GENERIC-NEXT: .LBB45_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB45_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1207,6 +2122,36 @@ define i64 @brRI_i64_sgt(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a1, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB46_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB46_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB46_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB46_5
+; GENERIC-NEXT: .LBB46_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB46_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1250,6 +2195,36 @@ define i64 @brR0_i64_sgt(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a1, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB47_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB47_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB47_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB47_5
+; GENERIC-NEXT: .LBB47_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB47_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1293,6 +2268,40 @@ define i64 @brRR_i64_sge(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmplt16 a3, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB48_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: .LBB48_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB48_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB48_5
+; GENERIC-NEXT: .LBB48_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB48_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1336,6 +2345,36 @@ define i64 @brRI_i64_sge(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a1, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB49_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB49_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB49_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB49_5
+; GENERIC-NEXT: .LBB49_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB49_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1359,6 +2398,24 @@ define i64 @brR0_i64_sge(i64 %x) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB50_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB50_3
+; GENERIC-NEXT: .LBB50_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB50_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1402,6 +2459,35 @@ define i64 @brRR_i64_slt(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmplt16 a3, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB51_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB51_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB51_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB51_5
+; GENERIC-NEXT: .LBB51_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB51_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1446,6 +2532,37 @@ define i64 @brRI_i64_slt(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a2, a1
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: movi16 a3, 9
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB52_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB52_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB52_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB52_5
+; GENERIC-NEXT: .LBB52_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB52_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1472,6 +2589,30 @@ define i64 @brR0_i64_slt(i64 %x) {
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 255
+; GENERIC-NEXT: lsli16 a2, a0, 24
+; GENERIC-NEXT: lsli16 a3, a0, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a2, a0, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a0
+; GENERIC-NEXT: cmplt16 a2, a1
+; GENERIC-NEXT: bf16 .LBB53_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: br32 .LBB53_3
+; GENERIC-NEXT: .LBB53_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: .LBB53_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1515,6 +2656,40 @@ define i64 @brRR_i64_sle(i64 %x, i64 %y) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i64_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmplt16 a1, a3
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB54_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: .LBB54_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB54_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB54_5
+; GENERIC-NEXT: .LBB54_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB54_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1559,6 +2734,37 @@ define i64 @brRI_i64_sle(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i64_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a2, a1
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: movi16 a3, 10
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB55_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB55_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB55_4
+; GENERIC-NEXT: # %bb.3: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB55_5
+; GENERIC-NEXT: .LBB55_4: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB55_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1606,6 +2812,39 @@ define i64 @brR0_i64_sle(i64 %x) {
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i64_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a2, a1
+; GENERIC-NEXT: mvcv16 a3
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB56_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 a2, a3
+; GENERIC-NEXT: btsti16 a2, 0
+; GENERIC-NEXT: bf16 .LBB56_4
+; GENERIC-NEXT: .LBB56_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: br32 .LBB56_5
+; GENERIC-NEXT: .LBB56_3:
+; GENERIC-NEXT: subu16 a2, a0
+; GENERIC-NEXT: btsti16 a2, 0
+; GENERIC-NEXT: bt16 .LBB56_2
+; GENERIC-NEXT: .LBB56_4: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: .LBB56_5: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1631,6 +2870,25 @@ define i64 @brCBit_i64(i1 %c) {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brCBit_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB57_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB57_3
+; GENERIC-NEXT: .LBB57_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB57_3: # %label1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
br i1 %c, label %label1, label %label2
label1:
@@ -1654,6 +2912,37 @@ define i16 @brRR_i16_eq(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB58_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmpne16 l0, a0
+; GENERIC-NEXT: bt16 .LBB58_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB58_3
+; GENERIC-NEXT: .LBB58_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB58_3: # %label1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -1675,6 +2964,31 @@ define i16 @brRI_i16_eq(i16 %x) {
; CHECK-NEXT: .LBB59_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 10
+; GENERIC-NEXT: bt16 .LBB59_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB59_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -1695,6 +3009,31 @@ define i16 @brR0_i16_eq(i16 %x) {
; CHECK-NEXT: .LBB60_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 0
+; GENERIC-NEXT: bf16 .LBB60_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB60_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -1718,6 +3057,37 @@ define i16 @brRR_i16_ne(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB61_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmpne16 l0, a0
+; GENERIC-NEXT: bf16 .LBB61_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB61_3
+; GENERIC-NEXT: .LBB61_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB61_3: # %label1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -1739,6 +3109,31 @@ define i16 @brRI_i16_ne(i16 %x) {
; CHECK-NEXT: .LBB62_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 10
+; GENERIC-NEXT: bf16 .LBB62_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB62_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -1759,6 +3154,31 @@ define i16 @brR0_i16_ne(i16 %x) {
; CHECK-NEXT: .LBB63_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 0
+; GENERIC-NEXT: bf16 .LBB63_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB63_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -1782,6 +3202,37 @@ define i16 @brRR_i16_ugt(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB64_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: cmphs16 l0, a1
+; GENERIC-NEXT: bt16 .LBB64_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB64_3
+; GENERIC-NEXT: .LBB64_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB64_3: # %label1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1805,6 +3256,31 @@ define i16 @brRI_i16_ugt(i16 %x) {
; CHECK-NEXT: .LBB65_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmphsi16 a3, 11
+; GENERIC-NEXT: bf16 .LBB65_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB65_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1827,6 +3303,31 @@ define i16 @brR0_i16_ugt(i16 %x) {
; CHECK-NEXT: .LBB66_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 0
+; GENERIC-NEXT: bf16 .LBB66_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB66_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1852,6 +3353,37 @@ define i16 @brRR_i16_uge(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB67_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: bf16 .LBB67_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB67_3
+; GENERIC-NEXT: .LBB67_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB67_3: # %label1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1875,6 +3407,31 @@ define i16 @brRI_i16_uge(i16 %x) {
; CHECK-NEXT: .LBB68_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmphsi16 a3, 10
+; GENERIC-NEXT: bf16 .LBB68_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB68_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1900,6 +3457,37 @@ define i16 @brRR_i16_ult(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB69_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: bt16 .LBB69_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB69_3
+; GENERIC-NEXT: .LBB69_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB69_3: # %label1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1924,6 +3512,32 @@ define i16 @brRI_i16_ult(i16 %x) {
; CHECK-NEXT: .LBB70_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 9
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: bf16 .LBB70_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB70_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1950,6 +3564,37 @@ define i16 @brRR_i16_ule(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB71_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: cmphs16 l0, a1
+; GENERIC-NEXT: bf16 .LBB71_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: br32 .LBB71_3
+; GENERIC-NEXT: .LBB71_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB71_3: # %label1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1974,6 +3619,32 @@ define i16 @brRI_i16_ule(i16 %x) {
; CHECK-NEXT: .LBB72_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 10
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: bf16 .LBB72_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB72_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -1996,6 +3667,31 @@ define i16 @brR0_i16_ule(i16 %x) {
; CHECK-NEXT: .LBB73_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 0
+; GENERIC-NEXT: bt16 .LBB73_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB73_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2021,6 +3717,24 @@ define i16 @brRR_i16_sgt(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB74_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bf16 .LBB74_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB74_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2044,6 +3758,23 @@ define i16 @brRI_i16_sgt(i16 %x) {
; CHECK-NEXT: .LBB75_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: bt16 .LBB75_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB75_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2067,6 +3798,23 @@ define i16 @brR0_i16_sgt(i16 %x) {
; CHECK-NEXT: .LBB76_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 1
+; GENERIC-NEXT: bt16 .LBB76_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB76_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2092,6 +3840,24 @@ define i16 @brRR_i16_sge(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB77_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB77_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB77_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2115,6 +3881,23 @@ define i16 @brRI_i16_sge(i16 %x) {
; CHECK-NEXT: .LBB78_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: bt16 .LBB78_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB78_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2137,6 +3920,24 @@ define i16 @brR0_i16_sge(i16 %x) {
; CHECK-NEXT: .LBB79_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB79_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB79_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2162,6 +3963,24 @@ define i16 @brRR_i16_slt(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB80_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bf16 .LBB80_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB80_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2186,6 +4005,24 @@ define i16 @brRI_i16_slt(i16 %x) {
; CHECK-NEXT: .LBB81_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 9
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB81_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB81_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2211,6 +4048,30 @@ define i16 @brR0_i16_slt(i16 %x) {
; CHECK-NEXT: .LBB82_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a2, a1, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a2, a0
+; GENERIC-NEXT: bf16 .LBB82_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB82_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2236,6 +4097,24 @@ define i16 @brRR_i16_sle(i16 %x, i16 %y) {
; CHECK-NEXT: .LBB83_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i16_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB83_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB83_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2260,6 +4139,24 @@ define i16 @brRI_i16_sle(i16 %x) {
; CHECK-NEXT: .LBB84_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i16_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB84_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB84_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2282,6 +4179,24 @@ define i16 @brR0_i16_sle(i16 %x) {
; CHECK-NEXT: .LBB85_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i16_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB85_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB85_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2305,6 +4220,24 @@ define i16 @brCBit_i16(i1 %c) {
; CHECK-NEXT: .LBB86_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brCBit_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB86_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB86_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
br i1 %c, label %label1, label %label2
label1:
@@ -2328,6 +4261,25 @@ define i8 @brRR_i8_eq(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB87_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: bt16 .LBB87_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB87_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -2349,6 +4301,24 @@ define i8 @brRI_i8_eq(i8 %x) {
; CHECK-NEXT: .LBB88_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 10
+; GENERIC-NEXT: bt16 .LBB88_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB88_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -2369,6 +4339,24 @@ define i8 @brR0_i8_eq(i8 %x) {
; CHECK-NEXT: .LBB89_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB89_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB89_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -2392,6 +4380,25 @@ define i8 @brRR_i8_ne(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB90_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: bf16 .LBB90_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB90_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -2413,6 +4420,24 @@ define i8 @brRI_i8_ne(i8 %x) {
; CHECK-NEXT: .LBB91_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 10
+; GENERIC-NEXT: bf16 .LBB91_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB91_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -2433,6 +4458,24 @@ define i8 @brR0_i8_ne(i8 %x) {
; CHECK-NEXT: .LBB92_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB92_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB92_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -2456,6 +4499,25 @@ define i8 @brRR_i8_ugt(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB93_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bt16 .LBB93_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB93_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2479,6 +4541,24 @@ define i8 @brRI_i8_ugt(i8 %x) {
; CHECK-NEXT: .LBB94_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmphsi16 a1, 11
+; GENERIC-NEXT: bf16 .LBB94_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB94_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2501,6 +4581,24 @@ define i8 @brR0_i8_ugt(i8 %x) {
; CHECK-NEXT: .LBB95_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB95_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB95_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2526,6 +4624,25 @@ define i8 @brRR_i8_uge(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB96_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bf16 .LBB96_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB96_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2549,6 +4666,24 @@ define i8 @brRI_i8_uge(i8 %x) {
; CHECK-NEXT: .LBB97_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmphsi16 a1, 10
+; GENERIC-NEXT: bf16 .LBB97_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB97_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2574,6 +4709,25 @@ define i8 @brRR_i8_ult(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB98_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bt16 .LBB98_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB98_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2598,6 +4752,25 @@ define i8 @brRI_i8_ult(i8 %x) {
; CHECK-NEXT: .LBB99_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: movi16 a0, 9
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bf16 .LBB99_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB99_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2624,6 +4797,25 @@ define i8 @brRR_i8_ule(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB100_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bf16 .LBB100_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB100_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2648,6 +4840,25 @@ define i8 @brRI_i8_ule(i8 %x) {
; CHECK-NEXT: .LBB101_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: movi16 a0, 10
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bf16 .LBB101_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB101_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2670,6 +4881,24 @@ define i8 @brR0_i8_ule(i8 %x) {
; CHECK-NEXT: .LBB102_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bt16 .LBB102_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB102_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2695,6 +4924,24 @@ define i8 @brRR_i8_sgt(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB103_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bf16 .LBB103_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB103_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2718,6 +4965,23 @@ define i8 @brRI_i8_sgt(i8 %x) {
; CHECK-NEXT: .LBB104_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: bt16 .LBB104_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB104_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2741,6 +5005,23 @@ define i8 @brR0_i8_sgt(i8 %x) {
; CHECK-NEXT: .LBB105_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 1
+; GENERIC-NEXT: bt16 .LBB105_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB105_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2766,6 +5047,24 @@ define i8 @brRR_i8_sge(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB106_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB106_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB106_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2789,6 +5088,23 @@ define i8 @brRI_i8_sge(i8 %x) {
; CHECK-NEXT: .LBB107_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: bt16 .LBB107_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB107_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2811,6 +5127,24 @@ define i8 @brR0_i8_sge(i8 %x) {
; CHECK-NEXT: .LBB108_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB108_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB108_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2836,6 +5170,24 @@ define i8 @brRR_i8_slt(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB109_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bf16 .LBB109_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB109_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2860,6 +5212,24 @@ define i8 @brRI_i8_slt(i8 %x) {
; CHECK-NEXT: .LBB110_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a1, 9
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB110_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB110_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2885,6 +5255,30 @@ define i8 @brR0_i8_slt(i8 %x) {
; CHECK-NEXT: .LBB111_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a3, a1, 16
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: lsli16 a2, a1, 8
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a2, a0
+; GENERIC-NEXT: bf16 .LBB111_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB111_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2910,6 +5304,24 @@ define i8 @brRR_i8_sle(i8 %x, i8 %y) {
; CHECK-NEXT: .LBB112_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i8_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB112_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB112_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2934,6 +5346,24 @@ define i8 @brRI_i8_sle(i8 %x) {
; CHECK-NEXT: .LBB113_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i8_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB113_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB113_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2956,6 +5386,24 @@ define i8 @brR0_i8_sle(i8 %x) {
; CHECK-NEXT: .LBB114_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i8_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB114_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB114_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -2979,6 +5427,24 @@ define i8 @brCBit_i8(i1 %c) {
; CHECK-NEXT: .LBB115_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brCBit_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB115_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB115_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
br i1 %c, label %label1, label %label2
label1:
@@ -3002,6 +5468,25 @@ define i1 @brRR_i1_eq(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB116_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: bt16 .LBB116_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB116_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -3023,6 +5508,24 @@ define i1 @brRI_i1_eq(i1 %x) {
; CHECK-NEXT: .LBB117_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB117_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB117_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -3044,6 +5547,24 @@ define i1 @brR0_i1_eq(i1 %x) {
; CHECK-NEXT: .LBB118_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB118_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB118_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -3067,6 +5588,25 @@ define i1 @brRR_i1_ne(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB119_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: bf16 .LBB119_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB119_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %y, %x
br i1 %icmp, label %label1, label %label2
@@ -3087,6 +5627,24 @@ define i1 @brRI_i1_ne(i1 %x) {
; CHECK-NEXT: .LBB120_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB120_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB120_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %x, 10
br i1 %icmp, label %label1, label %label2
@@ -3107,6 +5665,24 @@ define i1 @brR0_i1_ne(i1 %x) {
; CHECK-NEXT: .LBB121_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB121_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB121_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %x, 0
br i1 %icmp, label %label1, label %label2
@@ -3130,6 +5706,25 @@ define i1 @brRR_i1_ugt(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB122_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bt16 .LBB122_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB122_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3152,6 +5747,24 @@ define i1 @brRI_i1_ugt(i1 %x) {
; CHECK-NEXT: .LBB123_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB123_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB123_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3174,6 +5787,24 @@ define i1 @brR0_i1_ugt(i1 %x) {
; CHECK-NEXT: .LBB124_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB124_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB124_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3199,6 +5830,25 @@ define i1 @brRR_i1_uge(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB125_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bf16 .LBB125_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB125_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3222,6 +5872,23 @@ define i1 @brRI_i1_uge(i1 %x) {
; CHECK-NEXT: .LBB126_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB126_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB126_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3247,6 +5914,25 @@ define i1 @brRR_i1_ult(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB127_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: bt16 .LBB127_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB127_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3270,6 +5956,23 @@ define i1 @brRI_i1_ult(i1 %x) {
; CHECK-NEXT: .LBB128_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB128_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB128_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3296,6 +5999,25 @@ define i1 @brRR_i1_ule(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB129_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: bf16 .LBB129_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB129_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3319,6 +6041,24 @@ define i1 @brRI_i1_ule(i1 %x) {
; CHECK-NEXT: .LBB130_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB130_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB130_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3342,6 +6082,24 @@ define i1 @brR0_i1_ule(i1 %x) {
; CHECK-NEXT: .LBB131_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB131_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB131_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3367,6 +6125,26 @@ define i1 @brRR_i1_sgt(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB132_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 7
+; GENERIC-NEXT: asri16 a1, a1, 7
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bf16 .LBB132_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB132_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3390,6 +6168,23 @@ define i1 @brRI_i1_sgt(i1 %x) {
; CHECK-NEXT: .LBB133_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB133_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB133_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3413,6 +6208,23 @@ define i1 @brR0_i1_sgt(i1 %x) {
; CHECK-NEXT: .LBB134_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB134_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB134_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3438,6 +6250,26 @@ define i1 @brRR_i1_sge(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB135_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: lsli16 a1, a1, 7
+; GENERIC-NEXT: asri16 a1, a1, 7
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bt16 .LBB135_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB135_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3461,6 +6293,24 @@ define i1 @brRI_i1_sge(i1 %x) {
; CHECK-NEXT: .LBB136_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB136_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB136_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3484,6 +6334,24 @@ define i1 @brR0_i1_sge(i1 %x) {
; CHECK-NEXT: .LBB137_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB137_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB137_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3509,6 +6377,26 @@ define i1 @brRR_i1_slt(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB138_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: lsli16 a1, a1, 7
+; GENERIC-NEXT: asri16 a1, a1, 7
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: bf16 .LBB138_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB138_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3531,6 +6419,24 @@ define i1 @brRI_i1_slt(i1 %x) {
; CHECK-NEXT: .LBB139_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bt16 .LBB139_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB139_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3553,6 +6459,24 @@ define i1 @brR0_i1_slt(i1 %x) {
; CHECK-NEXT: .LBB140_2: # %label1
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bt16 .LBB140_2
+; GENERIC-NEXT: # %bb.1: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB140_2: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3578,6 +6502,26 @@ define i1 @brRR_i1_sle(i1 %x, i1 %y) {
; CHECK-NEXT: .LBB141_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRR_i1_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 7
+; GENERIC-NEXT: asri16 a1, a1, 7
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: bt16 .LBB141_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB141_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3601,6 +6545,23 @@ define i1 @brRI_i1_sle(i1 %x) {
; CHECK-NEXT: .LBB142_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brRI_i1_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB142_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB142_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3624,6 +6585,23 @@ define i1 @brR0_i1_sle(i1 %x) {
; CHECK-NEXT: .LBB143_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brR0_i1_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB143_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB143_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0
; CHECK-UGTXT: rts16
entry:
@@ -3647,6 +6625,24 @@ define i1 @brCBit_i1(i1 %c) {
; CHECK-NEXT: .LBB144_2: # %label2
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: brCBit_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: bf16 .LBB144_2
+; GENERIC-NEXT: # %bb.1: # %label1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB144_2: # %label2
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
br i1 %c, label %label1, label %label2
label1:
diff --git a/llvm/test/CodeGen/CSKY/call-16bit.ll b/llvm/test/CodeGen/CSKY/call-16bit.ll
new file mode 100644
index 0000000000000..23d7c97acac81
--- /dev/null
+++ b/llvm/test/CodeGen/CSKY/call-16bit.ll
@@ -0,0 +1,198 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=CHECK-PIC-SMALL
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK-PIC-LARGE
+
+ at p_fun = global void (i32, i32)* @bar, align 8
+
+declare void @bar(i32, i32)
+
+define void @foo(i32 %a, i32* %ptr){
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: subi16 sp, sp, 4
+; CHECK-NEXT: .cfi_def_cfa_offset 4
+; CHECK-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; CHECK-NEXT: .cfi_offset lr, -4
+; CHECK-NEXT: subi16 sp, sp, 4
+; CHECK-NEXT: .cfi_def_cfa_offset 8
+; CHECK-NEXT: ld16.w a1, (a1, 0)
+; CHECK-NEXT: lrw32 a2, [.LCPI0_0]
+; CHECK-NEXT: jsr16 a2
+; CHECK-NEXT: addi16 sp, sp, 4
+; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; CHECK-NEXT: addi16 sp, sp, 4
+; CHECK-NEXT: rts16
+; CHECK-NEXT: .p2align 1
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: .p2align 2
+; CHECK-NEXT: .LCPI0_0:
+; CHECK-NEXT: .long bar
+;
+; CHECK-PIC-SMALL-LABEL: foo:
+; CHECK-PIC-SMALL: # %bb.0: # %entry
+; CHECK-PIC-SMALL-NEXT: subi16 sp, sp, 8
+; CHECK-PIC-SMALL-NEXT: .cfi_def_cfa_offset 8
+; CHECK-PIC-SMALL-NEXT: st32.w rgb, (sp, 4) # 4-byte Folded Spill
+; CHECK-PIC-SMALL-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; CHECK-PIC-SMALL-NEXT: .cfi_offset rgb, -4
+; CHECK-PIC-SMALL-NEXT: .cfi_offset lr, -8
+; CHECK-PIC-SMALL-NEXT: subi16 sp, sp, 4
+; CHECK-PIC-SMALL-NEXT: .cfi_def_cfa_offset 12
+; CHECK-PIC-SMALL-NEXT: lrw32 rgb, [.LCPI0_0]
+; CHECK-PIC-SMALL-NEXT: mov32 a2, rgb
+; CHECK-PIC-SMALL-NEXT: ld16.w a1, (a1, 0)
+; CHECK-PIC-SMALL-NEXT: lrw32 a3, [.LCPI0_1]
+; CHECK-PIC-SMALL-NEXT: addu16 a2, a2, a3
+; CHECK-PIC-SMALL-NEXT: ld16.w a2, (a2, 0)
+; CHECK-PIC-SMALL-NEXT: jsr16 a2
+; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 4
+; CHECK-PIC-SMALL-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; CHECK-PIC-SMALL-NEXT: ld32.w rgb, (sp, 4) # 4-byte Folded Reload
+; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 8
+; CHECK-PIC-SMALL-NEXT: rts16
+; CHECK-PIC-SMALL-NEXT: .p2align 1
+; CHECK-PIC-SMALL-NEXT: # %bb.1:
+; CHECK-PIC-SMALL-NEXT: .p2align 2
+; CHECK-PIC-SMALL-NEXT: .LCPI0_0:
+; CHECK-PIC-SMALL-NEXT: .long _GLOBAL_OFFSET_TABLE_
+; CHECK-PIC-SMALL-NEXT: .LCPI0_1:
+; CHECK-PIC-SMALL-NEXT: .long bar at PLT
+;
+; CHECK-PIC-LARGE-LABEL: foo:
+; CHECK-PIC-LARGE: # %bb.0: # %entry
+; CHECK-PIC-LARGE-NEXT: subi16 sp, sp, 8
+; CHECK-PIC-LARGE-NEXT: .cfi_def_cfa_offset 8
+; CHECK-PIC-LARGE-NEXT: st32.w rgb, (sp, 4) # 4-byte Folded Spill
+; CHECK-PIC-LARGE-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; CHECK-PIC-LARGE-NEXT: .cfi_offset rgb, -4
+; CHECK-PIC-LARGE-NEXT: .cfi_offset lr, -8
+; CHECK-PIC-LARGE-NEXT: subi16 sp, sp, 4
+; CHECK-PIC-LARGE-NEXT: .cfi_def_cfa_offset 12
+; CHECK-PIC-LARGE-NEXT: lrw32 rgb, [.LCPI0_0]
+; CHECK-PIC-LARGE-NEXT: mov32 a2, rgb
+; CHECK-PIC-LARGE-NEXT: ld16.w a1, (a1, 0)
+; CHECK-PIC-LARGE-NEXT: lrw32 a3, [.LCPI0_1]
+; CHECK-PIC-LARGE-NEXT: addu16 a2, a2, a3
+; CHECK-PIC-LARGE-NEXT: ld16.w a2, (a2, 0)
+; CHECK-PIC-LARGE-NEXT: jsr16 a2
+; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 4
+; CHECK-PIC-LARGE-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; CHECK-PIC-LARGE-NEXT: ld32.w rgb, (sp, 4) # 4-byte Folded Reload
+; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 8
+; CHECK-PIC-LARGE-NEXT: rts16
+; CHECK-PIC-LARGE-NEXT: .p2align 1
+; CHECK-PIC-LARGE-NEXT: # %bb.1:
+; CHECK-PIC-LARGE-NEXT: .p2align 2
+; CHECK-PIC-LARGE-NEXT: .LCPI0_0:
+; CHECK-PIC-LARGE-NEXT: .long _GLOBAL_OFFSET_TABLE_
+; CHECK-PIC-LARGE-NEXT: .LCPI0_1:
+; CHECK-PIC-LARGE-NEXT: .long bar at PLT
+; CHECK-PIC-LABEL: foo:
+; CHECK-PIC: # %bb.0: # %entry
+; CHECK-PIC-NEXT: ld32.w a1, a1, 0
+; CHECK-PIC-NEXT: br32 bar
+entry:
+ %0 = load i32, i32* %ptr
+ tail call void (i32, i32) @bar(i32 %a, i32 %0)
+ ret void
+}
+
+define void @foo_indirect(i32 %a, i32* %ptr) {
+; CHECK-LABEL: foo_indirect:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: subi16 sp, sp, 4
+; CHECK-NEXT: .cfi_def_cfa_offset 4
+; CHECK-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; CHECK-NEXT: .cfi_offset lr, -4
+; CHECK-NEXT: subi16 sp, sp, 4
+; CHECK-NEXT: .cfi_def_cfa_offset 8
+; CHECK-NEXT: lrw32 a2, [.LCPI1_0]
+; CHECK-NEXT: ld16.w a2, (a2, 0)
+; CHECK-NEXT: ld16.w a1, (a1, 0)
+; CHECK-NEXT: jsr16 a2
+; CHECK-NEXT: addi16 sp, sp, 4
+; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; CHECK-NEXT: addi16 sp, sp, 4
+; CHECK-NEXT: rts16
+; CHECK-NEXT: .p2align 1
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: .p2align 2
+; CHECK-NEXT: .LCPI1_0:
+; CHECK-NEXT: .long p_fun
+;
+; CHECK-PIC-SMALL-LABEL: foo_indirect:
+; CHECK-PIC-SMALL: # %bb.0: # %entry
+; CHECK-PIC-SMALL-NEXT: subi16 sp, sp, 8
+; CHECK-PIC-SMALL-NEXT: .cfi_def_cfa_offset 8
+; CHECK-PIC-SMALL-NEXT: st32.w rgb, (sp, 4) # 4-byte Folded Spill
+; CHECK-PIC-SMALL-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; CHECK-PIC-SMALL-NEXT: .cfi_offset rgb, -4
+; CHECK-PIC-SMALL-NEXT: .cfi_offset lr, -8
+; CHECK-PIC-SMALL-NEXT: subi16 sp, sp, 4
+; CHECK-PIC-SMALL-NEXT: .cfi_def_cfa_offset 12
+; CHECK-PIC-SMALL-NEXT: lrw32 rgb, [.LCPI1_0]
+; CHECK-PIC-SMALL-NEXT: mov32 a2, rgb
+; CHECK-PIC-SMALL-NEXT: lrw32 a3, [.LCPI1_1]
+; CHECK-PIC-SMALL-NEXT: addu16 a2, a2, a3
+; CHECK-PIC-SMALL-NEXT: ld16.w a2, (a2, 0)
+; CHECK-PIC-SMALL-NEXT: ld16.w a2, (a2, 0)
+; CHECK-PIC-SMALL-NEXT: ld16.w a1, (a1, 0)
+; CHECK-PIC-SMALL-NEXT: jsr16 a2
+; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 4
+; CHECK-PIC-SMALL-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; CHECK-PIC-SMALL-NEXT: ld32.w rgb, (sp, 4) # 4-byte Folded Reload
+; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 8
+; CHECK-PIC-SMALL-NEXT: rts16
+; CHECK-PIC-SMALL-NEXT: .p2align 1
+; CHECK-PIC-SMALL-NEXT: # %bb.1:
+; CHECK-PIC-SMALL-NEXT: .p2align 2
+; CHECK-PIC-SMALL-NEXT: .LCPI1_0:
+; CHECK-PIC-SMALL-NEXT: .long _GLOBAL_OFFSET_TABLE_
+; CHECK-PIC-SMALL-NEXT: .LCPI1_1:
+; CHECK-PIC-SMALL-NEXT: .long p_fun at GOT
+;
+; CHECK-PIC-LARGE-LABEL: foo_indirect:
+; CHECK-PIC-LARGE: # %bb.0: # %entry
+; CHECK-PIC-LARGE-NEXT: subi16 sp, sp, 8
+; CHECK-PIC-LARGE-NEXT: .cfi_def_cfa_offset 8
+; CHECK-PIC-LARGE-NEXT: st32.w rgb, (sp, 4) # 4-byte Folded Spill
+; CHECK-PIC-LARGE-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
+; CHECK-PIC-LARGE-NEXT: .cfi_offset rgb, -4
+; CHECK-PIC-LARGE-NEXT: .cfi_offset lr, -8
+; CHECK-PIC-LARGE-NEXT: subi16 sp, sp, 4
+; CHECK-PIC-LARGE-NEXT: .cfi_def_cfa_offset 12
+; CHECK-PIC-LARGE-NEXT: lrw32 rgb, [.LCPI1_0]
+; CHECK-PIC-LARGE-NEXT: mov32 a2, rgb
+; CHECK-PIC-LARGE-NEXT: lrw32 a3, [.LCPI1_1]
+; CHECK-PIC-LARGE-NEXT: addu16 a2, a2, a3
+; CHECK-PIC-LARGE-NEXT: ld16.w a2, (a2, 0)
+; CHECK-PIC-LARGE-NEXT: ld16.w a2, (a2, 0)
+; CHECK-PIC-LARGE-NEXT: ld16.w a1, (a1, 0)
+; CHECK-PIC-LARGE-NEXT: jsr16 a2
+; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 4
+; CHECK-PIC-LARGE-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
+; CHECK-PIC-LARGE-NEXT: ld32.w rgb, (sp, 4) # 4-byte Folded Reload
+; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 8
+; CHECK-PIC-LARGE-NEXT: rts16
+; CHECK-PIC-LARGE-NEXT: .p2align 1
+; CHECK-PIC-LARGE-NEXT: # %bb.1:
+; CHECK-PIC-LARGE-NEXT: .p2align 2
+; CHECK-PIC-LARGE-NEXT: .LCPI1_0:
+; CHECK-PIC-LARGE-NEXT: .long _GLOBAL_OFFSET_TABLE_
+; CHECK-PIC-LARGE-NEXT: .LCPI1_1:
+; CHECK-PIC-LARGE-NEXT: .long p_fun at GOT
+; CHECK-PIC-LABEL: foo_indirect:
+; CHECK-PIC: # %bb.0: # %entry
+; CHECK-PIC-NEXT: movi32 a2, p_fun
+; CHECK-PIC-NEXT: movih32 a3, p_fun
+; CHECK-PIC-NEXT: or32 a2, a3, a2
+; CHECK-PIC-NEXT: ld32.w a2, a2, 0
+; CHECK-PIC-NEXT: ld32.w a1, a1, 0
+; CHECK-PIC-NEXT: jmp32 a2
+entry:
+ %0 = load void (i32, i32)*, void (i32, i32)** @p_fun, align 8
+ %1 = load i32, i32* %ptr
+ tail call void (i32, i32) %0(i32 %a, i32 %1)
+ ret void
+}
diff --git a/llvm/test/CodeGen/CSKY/cmp-i.ll b/llvm/test/CodeGen/CSKY/cmp-i.ll
index 78d115c1d791f..e62d159f718ab 100644
--- a/llvm/test/CodeGen/CSKY/cmp-i.ll
+++ b/llvm/test/CodeGen/CSKY/cmp-i.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
;eq
define i1 @icmpRR_eq(i32 %x, i32 %y) {
@@ -8,6 +9,16 @@ define i1 @icmpRR_eq(i32 %x, i32 %y) {
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %y, %x
ret i1 %icmp
@@ -19,6 +30,16 @@ define i1 @icmpRI_eq(i32 %x) {
; CHECK-NEXT: cmpnei16 a0, 10
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 10
ret i1 %icmp
@@ -32,6 +53,26 @@ define i1 @icmpRI_X_eq(i32 %x) {
; CHECK-NEXT: cmpne16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 232
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmpne16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 4097000
ret i1 %icmp
@@ -46,6 +87,19 @@ define i1 @ICMP_LONG_eq(i64 %x, i64 %y) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %y, %x
ret i1 %icmp
@@ -59,6 +113,19 @@ define i1 @ICMP_LONG_I_eq(i64 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a2, a0
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmpnei16 a2, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %x, 1
ret i1 %icmp
@@ -72,6 +139,31 @@ define i1 @ICMP_SHORT_eq(i16 %x, i16 %y) {
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmpne16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %y, %x
ret i1 %icmp
@@ -84,6 +176,25 @@ define i1 @ICMP_SHORT_I_eq(i16 %x) {
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %x, 1
ret i1 %icmp
@@ -97,6 +208,19 @@ define i1 @ICMP_CHAR_eq(i8 %x, i8 %y) {
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %y, %x
ret i1 %icmp
@@ -109,6 +233,18 @@ define i1 @ICMP_CHAR_I_eq(i8 %x) {
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %x, 1
ret i1 %icmp
@@ -120,6 +256,17 @@ define i1 @ICMP_BIT_eq(i1 %x, i1 %y) {
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %y, %x
ret i1 %icmp
@@ -129,6 +276,14 @@ define i1 @ICMP_BIT_I_eq(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_eq:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %x, 1
ret i1 %icmp
@@ -141,6 +296,18 @@ define i1 @icmpRR_ne(i32 %x, i32 %y) {
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %y, %x
ret i1 %icmp
@@ -152,6 +319,18 @@ define i1 @icmpRI_ne(i32 %x) {
; CHECK-NEXT: cmpnei16 a0, 10
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 10
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 10
ret i1 %icmp
@@ -165,6 +344,28 @@ define i1 @icmpRI_X_ne(i32 %x) {
; CHECK-NEXT: cmpne16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 232
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmpne16 a0, a2
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 4097000
ret i1 %icmp
@@ -179,6 +380,21 @@ define i1 @ICMP_LONG_ne(i64 %x, i64 %y) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %y, %x
ret i1 %icmp
@@ -192,6 +408,21 @@ define i1 @ICMP_LONG_I_ne(i64 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: subu16 a2, a0
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %x, 1
ret i1 %icmp
@@ -205,6 +436,33 @@ define i1 @ICMP_SHORT_ne(i16 %x, i16 %y) {
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmpne16 l0, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %y, %x
ret i1 %icmp
@@ -217,6 +475,27 @@ define i1 @ICMP_SHORT_I_ne(i16 %x) {
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %x, 1
ret i1 %icmp
@@ -230,6 +509,21 @@ define i1 @ICMP_CHAR_ne(i8 %x, i8 %y) {
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %y, %x
ret i1 %icmp
@@ -242,6 +536,20 @@ define i1 @ICMP_CHAR_I_ne(i8 %x) {
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %x, 1
ret i1 %icmp
@@ -252,6 +560,15 @@ define i1 @ICMP_BIT_ne(i1 %x, i1 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %y, %x
ret i1 %icmp
@@ -262,6 +579,16 @@ define i1 @ICMP_BIT_I_ne(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_ne:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %x, 1
ret i1 %icmp
@@ -275,6 +602,16 @@ define i1 @icmpRR_ugt(i32 %x, i32 %y) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %y, %x
ret i1 %icmp
@@ -287,6 +624,17 @@ define i1 @icmpRI_ugt(i32 %x) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %x, 10
ret i1 %icmp
@@ -300,6 +648,26 @@ define i1 @icmpRI_X_ugt(i32 %x) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 232
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %x, 4097000
ret i1 %icmp
@@ -324,6 +692,30 @@ define i1 @ICMP_LONG_ugt(i64 %x, i64 %y) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmphs16 a1, a3
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB25_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, l0
+; GENERIC-NEXT: .LBB25_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i64 %y, %x
ret i1 %icmp
@@ -339,6 +731,25 @@ define i1 @ICMP_LONG_I_ugt(i64 %x) {
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: movf32 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB26_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 a2, a1
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: .LBB26_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i64 %x, 1
ret i1 %icmp
@@ -352,6 +763,31 @@ define i1 @ICMP_SHORT_ugt(i16 %x, i16 %y) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: cmphs16 l0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %y, %x
ret i1 %icmp
@@ -365,6 +801,26 @@ define i1 @ICMP_SHORT_I_ugt(i16 %x) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %x, 1
ret i1 %icmp
@@ -378,6 +834,19 @@ define i1 @ICMP_CHAR_ugt(i8 %x, i8 %y) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %y, %x
ret i1 %icmp
@@ -391,6 +860,19 @@ define i1 @ICMP_CHAR_I_ugt(i8 %x) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %x, 1
ret i1 %icmp
@@ -402,6 +884,17 @@ define i1 @ICMP_BIT_ugt(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %y, %x
ret i1 %icmp
@@ -412,6 +905,15 @@ define i1 @ICMP_BIT_I_ugt(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_ugt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %x, 1
ret i1 %icmp
@@ -425,6 +927,18 @@ define i1 @icmpRR_uge(i32 %x, i32 %y) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %y, %x
ret i1 %icmp
@@ -437,6 +951,17 @@ define i1 @icmpRI_uge(i32 %x) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 9
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %x, 10
ret i1 %icmp
@@ -450,6 +975,26 @@ define i1 @icmpRI_X_uge(i32 %x) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 231
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %x, 4097000
ret i1 %icmp
@@ -481,6 +1026,38 @@ define i1 @ICMP_LONG_uge(i64 %x, i64 %y) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: mov16 l0, a0
+; GENERIC-NEXT: cmphs16 a3, a1
+; GENERIC-NEXT: mvcv16 l1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmphs16 a2, l0
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB36_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 a0, l1
+; GENERIC-NEXT: br32 .LBB36_3
+; GENERIC-NEXT: .LBB36_2:
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB36_3: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i64 %y, %x
ret i1 %icmp
@@ -493,6 +1070,19 @@ define i1 @ICMP_LONG_I_uge(i64 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i64 %x, 1
ret i1 %icmp
@@ -506,6 +1096,33 @@ define i1 @ICMP_SHORT_uge(i16 %x, i16 %y) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %y, %x
ret i1 %icmp
@@ -518,6 +1135,27 @@ define i1 @ICMP_SHORT_I_uge(i16 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %x, 1
ret i1 %icmp
@@ -531,6 +1169,21 @@ define i1 @ICMP_CHAR_uge(i8 %x, i8 %y) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %y, %x
ret i1 %icmp
@@ -543,6 +1196,20 @@ define i1 @ICMP_CHAR_I_uge(i8 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %x, 1
ret i1 %icmp
@@ -554,6 +1221,17 @@ define i1 @ICMP_BIT_uge(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %y, %x
ret i1 %icmp
@@ -563,6 +1241,14 @@ define i1 @ICMP_BIT_I_uge(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_uge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %x, 1
ret i1 %icmp
@@ -576,6 +1262,16 @@ define i1 @icmpRR_ult(i32 %x, i32 %y) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %y, %x
ret i1 %icmp
@@ -587,6 +1283,16 @@ define i1 @icmpRI_ult(i32 %x) {
; CHECK-NEXT: cmphsi16 a0, 10
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %x, 10
ret i1 %icmp
@@ -600,6 +1306,26 @@ define i1 @icmpRI_X_ult(i32 %x) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 232
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %x, 4097000
ret i1 %icmp
@@ -624,6 +1350,30 @@ define i1 @ICMP_LONG_ult(i64 %x, i64 %y) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmphs16 a3, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB47_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, l0
+; GENERIC-NEXT: .LBB47_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i64 %y, %x
ret i1 %icmp
@@ -636,6 +1386,17 @@ define i1 @ICMP_LONG_I_ult(i64 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i64 %x, 1
ret i1 %icmp
@@ -649,6 +1410,31 @@ define i1 @ICMP_SHORT_ult(i16 %x, i16 %y) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 l0, a1
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %y, %x
ret i1 %icmp
@@ -661,6 +1447,25 @@ define i1 @ICMP_SHORT_I_ult(i16 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %x, 1
ret i1 %icmp
@@ -674,6 +1479,19 @@ define i1 @ICMP_CHAR_ult(i8 %x, i8 %y) {
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %y, %x
ret i1 %icmp
@@ -686,6 +1504,18 @@ define i1 @ICMP_CHAR_I_ult(i8 %x) {
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %x, 1
ret i1 %icmp
@@ -697,6 +1527,17 @@ define i1 @ICMP_BIT_ult(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a2, a1
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %y, %x
ret i1 %icmp
@@ -707,6 +1548,16 @@ define i1 @ICMP_BIT_I_ult(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_ult:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %x, 1
ret i1 %icmp
@@ -720,6 +1571,18 @@ define i1 @icmpRR_ule(i32 %x, i32 %y) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %y, %x
ret i1 %icmp
@@ -731,6 +1594,16 @@ define i1 @icmpRI_ule(i32 %x) {
; CHECK-NEXT: cmphsi16 a0, 11
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %x, 10
ret i1 %icmp
@@ -744,6 +1617,26 @@ define i1 @icmpRI_X_ule(i32 %x) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 233
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %x, 4097000
ret i1 %icmp
@@ -775,6 +1668,38 @@ define i1 @ICMP_LONG_ule(i64 %x, i64 %y) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: mov16 l0, a0
+; GENERIC-NEXT: cmphs16 a1, a3
+; GENERIC-NEXT: mvcv16 l1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmphs16 l0, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB58_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 a0, l1
+; GENERIC-NEXT: br32 .LBB58_3
+; GENERIC-NEXT: .LBB58_2:
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB58_3: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i64 %y, %x
ret i1 %icmp
@@ -797,6 +1722,23 @@ define i1 @ICMP_LONG_I_ule(i64 %x) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB59_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: .LBB59_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i64 %x, 1
ret i1 %icmp
@@ -810,6 +1752,33 @@ define i1 @ICMP_SHORT_ule(i16 %x, i16 %y) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: lsli16 a3, a2, 24
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a3
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 8
+; GENERIC-NEXT: or16 l0, a2
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 l0, a0
+; GENERIC-NEXT: cmphs16 l0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %y, %x
ret i1 %icmp
@@ -822,6 +1791,25 @@ define i1 @ICMP_SHORT_I_ule(i16 %x) {
; CHECK-NEXT: cmphsi16 a0, 2
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmphsi16 a3, 2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %x, 1
ret i1 %icmp
@@ -835,6 +1823,21 @@ define i1 @ICMP_CHAR_ule(i8 %x, i8 %y) {
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %y, %x
ret i1 %icmp
@@ -847,6 +1850,18 @@ define i1 @ICMP_CHAR_I_ule(i8 %x) {
; CHECK-NEXT: cmphsi16 a0, 2
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a1, a0
+; GENERIC-NEXT: cmphsi16 a1, 2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %x, 1
ret i1 %icmp
@@ -858,6 +1873,17 @@ define i1 @ICMP_BIT_ule(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a2, a1
+; GENERIC-NEXT: or16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %y, %x
ret i1 %icmp
@@ -868,6 +1894,15 @@ define i1 @ICMP_BIT_I_ule(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_ule:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %x, 1
ret i1 %icmp
@@ -880,6 +1915,18 @@ define i1 @icmpRR_sgt(i32 %x, i32 %y) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %y, %x
ret i1 %icmp
@@ -892,6 +1939,19 @@ define i1 @icmpRI_sgt(i32 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 10
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %x, 10
ret i1 %icmp
@@ -905,6 +1965,28 @@ define i1 @icmpRI_X_sgt(i32 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 232
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a2, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %x, 4097000
ret i1 %icmp
@@ -932,6 +2014,31 @@ define i1 @ICMP_LONG_sgt(i64 %x, i64 %y) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmplt16 a1, a3
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB69_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: .LBB69_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i64 %y, %x
ret i1 %icmp
@@ -961,6 +2068,28 @@ define i1 @ICMP_LONG_I_sgt(i64 %x) {
; CHECK-NEXT: movf32 a0, a2
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a2, a1
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB70_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 a3, a2
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: .LBB70_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i64 %x, 1
ret i1 %icmp
@@ -974,6 +2103,20 @@ define i1 @ICMP_SHORT_sgt(i16 %x, i16 %y) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %y, %x
ret i1 %icmp
@@ -987,6 +2130,19 @@ define i1 @ICMP_SHORT_I_sgt(i16 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a0
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %x, 1
ret i1 %icmp
@@ -1000,6 +2156,20 @@ define i1 @ICMP_CHAR_sgt(i8 %x, i8 %y) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %y, %x
ret i1 %icmp
@@ -1013,6 +2183,19 @@ define i1 @ICMP_CHAR_I_sgt(i8 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a0
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %x, 1
ret i1 %icmp
@@ -1024,6 +2207,17 @@ define i1 @ICMP_BIT_sgt(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a2, a1
+; GENERIC-NEXT: and16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %y, %x
ret i1 %icmp
@@ -1034,6 +2228,16 @@ define i1 @ICMP_BIT_I_sgt(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_sgt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %x, 1
ret i1 %icmp
@@ -1046,6 +2250,16 @@ define i1 @icmpRR_sge(i32 %x, i32 %y) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %y, %x
ret i1 %icmp
@@ -1058,6 +2272,19 @@ define i1 @icmpRI_sge(i32 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 9
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %x, 10
ret i1 %icmp
@@ -1071,6 +2298,28 @@ define i1 @icmpRI_X_sge(i32 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 231
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a2, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %x, 4097000
ret i1 %icmp
@@ -1098,6 +2347,26 @@ define i1 @ICMP_LONG_sge(i64 %x, i64 %y) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmplt16 a3, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB80_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB80_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i64 %y, %x
ret i1 %icmp
@@ -1130,6 +2399,31 @@ define i1 @ICMP_LONG_I_sge(i64 %x) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a2, a0
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a3
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: cmpnei16 a2, 0
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB81_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB81_2:
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i64 %x, 1
ret i1 %icmp
@@ -1143,6 +2437,18 @@ define i1 @ICMP_SHORT_sge(i16 %x, i16 %y) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %y, %x
ret i1 %icmp
@@ -1156,6 +2462,20 @@ define i1 @ICMP_SHORT_I_sge(i16 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %x, 1
ret i1 %icmp
@@ -1169,6 +2489,18 @@ define i1 @ICMP_CHAR_sge(i8 %x, i8 %y) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %y, %x
ret i1 %icmp
@@ -1182,6 +2514,20 @@ define i1 @ICMP_CHAR_I_sge(i8 %x) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %x, 1
ret i1 %icmp
@@ -1193,6 +2539,17 @@ define i1 @ICMP_BIT_sge(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a2, a1
+; GENERIC-NEXT: or16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %y, %x
ret i1 %icmp
@@ -1203,6 +2560,15 @@ define i1 @ICMP_BIT_I_sge(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_sge:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %x, 1
ret i1 %icmp
@@ -1215,6 +2581,18 @@ define i1 @icmpRR_slt(i32 %x, i32 %y) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %y, %x
ret i1 %icmp
@@ -1226,6 +2604,18 @@ define i1 @icmpRI_slt(i32 %x) {
; CHECK-NEXT: cmplti16 a0, 10
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %x, 10
ret i1 %icmp
@@ -1239,6 +2629,28 @@ define i1 @icmpRI_X_slt(i32 %x) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 232
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a0, a2
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %x, 4097000
ret i1 %icmp
@@ -1266,6 +2678,31 @@ define i1 @ICMP_LONG_slt(i64 %x, i64 %y) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmplt16 a3, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB91_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: .LBB91_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i64 %y, %x
ret i1 %icmp
@@ -1294,6 +2731,27 @@ define i1 @ICMP_LONG_I_slt(i64 %x) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a1, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB92_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB92_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i64 %x, 1
ret i1 %icmp
@@ -1307,6 +2765,20 @@ define i1 @ICMP_SHORT_slt(i16 %x, i16 %y) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %y, %x
ret i1 %icmp
@@ -1319,6 +2791,19 @@ define i1 @ICMP_SHORT_I_slt(i16 %x) {
; CHECK-NEXT: cmplti16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %x, 1
ret i1 %icmp
@@ -1332,6 +2817,20 @@ define i1 @ICMP_CHAR_slt(i8 %x, i8 %y) {
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %y, %x
ret i1 %icmp
@@ -1344,6 +2843,19 @@ define i1 @ICMP_CHAR_I_slt(i8 %x) {
; CHECK-NEXT: cmplti16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %x, 1
ret i1 %icmp
@@ -1355,6 +2867,17 @@ define i1 @ICMP_BIT_slt(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %y, %x
ret i1 %icmp
@@ -1365,6 +2888,15 @@ define i1 @ICMP_BIT_I_slt(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_slt:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %x, 1
ret i1 %icmp
@@ -1378,6 +2910,16 @@ define i1 @icmpRR_sle(i32 %x, i32 %y) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRR_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %y, %x
ret i1 %icmp
@@ -1389,6 +2931,18 @@ define i1 @icmpRI_sle(i32 %x) {
; CHECK-NEXT: cmplti16 a0, 11
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %x, 10
ret i1 %icmp
@@ -1402,6 +2956,28 @@ define i1 @icmpRI_X_sle(i32 %x) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: icmpRI_X_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a1, a1, 24
+; GENERIC-NEXT: movi16 a2, 62
+; GENERIC-NEXT: lsli16 a2, a2, 16
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: movi16 a1, 131
+; GENERIC-NEXT: lsli16 a1, a1, 8
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 233
+; GENERIC-NEXT: or16 a2, a1
+; GENERIC-NEXT: cmplt16 a0, a2
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %x, 4097000
ret i1 %icmp
@@ -1429,6 +3005,26 @@ define i1 @ICMP_LONG_sle(i64 %x, i64 %y) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmplt16 a1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB102_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB102_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i64 %y, %x
ret i1 %icmp
@@ -1457,6 +3053,27 @@ define i1 @ICMP_LONG_I_sle(i64 %x) {
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_LONG_I_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 0
+; GENERIC-NEXT: cmplt16 a1, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmphsi16 a0, 2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB103_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB103_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i64 %x, 1
ret i1 %icmp
@@ -1470,6 +3087,18 @@ define i1 @ICMP_SHORT_sle(i16 %x, i16 %y) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %y, %x
ret i1 %icmp
@@ -1482,6 +3111,19 @@ define i1 @ICMP_SHORT_I_sle(i16 %x) {
; CHECK-NEXT: cmplti16 a0, 2
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_SHORT_I_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 2
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %x, 1
ret i1 %icmp
@@ -1495,6 +3137,18 @@ define i1 @ICMP_CHAR_sle(i8 %x, i8 %y) {
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %y, %x
ret i1 %icmp
@@ -1507,6 +3161,19 @@ define i1 @ICMP_CHAR_I_sle(i8 %x) {
; CHECK-NEXT: cmplti16 a0, 2
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_CHAR_I_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 2
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %x, 1
ret i1 %icmp
@@ -1518,6 +3185,17 @@ define i1 @ICMP_BIT_sle(i1 %x, i1 %y) {
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %y, %x
ret i1 %icmp
@@ -1527,6 +3205,14 @@ define i1 @ICMP_BIT_I_sle(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: ICMP_BIT_I_sle:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %x, 1
ret i1 %icmp
diff --git a/llvm/test/CodeGen/CSKY/cvt-i.ll b/llvm/test/CodeGen/CSKY/cvt-i.ll
index b6f045de2f291..3cb67b34bb36e 100644
--- a/llvm/test/CodeGen/CSKY/cvt-i.ll
+++ b/llvm/test/CodeGen/CSKY/cvt-i.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
; i32/i16/i8/i1 --> i64
define i64 @zextR_i64_0(i32 %x) {
@@ -7,6 +8,15 @@ define i64 @zextR_i64_0(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i64_0:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i32 %x to i64
ret i64 %zext
@@ -18,6 +28,24 @@ define i64 @zextR_i64_1(i16 %x) {
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i64_1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a0, a3
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i16 %x to i64
ret i64 %zext
@@ -29,6 +57,17 @@ define i64 @zextR_i64_2(i8 %x) {
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i64_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i8 %x to i64
ret i64 %zext
@@ -40,6 +79,17 @@ define i64 @zextR_i64_3(i1 %x) {
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i64_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i1 %x to i64
ret i64 %zext
@@ -51,6 +101,23 @@ define i32 @zextR_i32_1(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i32_1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: lsli16 a2, a1, 24
+; GENERIC-NEXT: lsli16 a1, a1, 16
+; GENERIC-NEXT: or16 a1, a2
+; GENERIC-NEXT: movi16 a2, 255
+; GENERIC-NEXT: lsli16 a3, a2, 8
+; GENERIC-NEXT: or16 a3, a1
+; GENERIC-NEXT: or16 a3, a2
+; GENERIC-NEXT: and16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i16 %x to i32
ret i32 %zext
@@ -61,6 +128,16 @@ define i32 @zextR_i32_2(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i32_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i8 %x to i32
ret i32 %zext
@@ -71,6 +148,16 @@ define i32 @zextR_i32_3(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i32_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i1 %x to i32
ret i32 %zext
@@ -82,6 +169,16 @@ define i16 @zextR_i16_2(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i16_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 255
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i8 %x to i16
ret i16 %zext
@@ -92,6 +189,16 @@ define i16 @zextR_i16_3(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i16_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i1 %x to i16
ret i16 %zext
@@ -103,6 +210,16 @@ define i8 @zextR_i8_3(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: zextR_i8_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%zext = zext i1 %x to i8
ret i8 %zext
@@ -114,6 +231,15 @@ define i64 @sextR_i64_0(i32 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: asri16 a1, a0, 31
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i64_0:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: asri16 a1, a0, 31
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i32 %x to i64
ret i64 %sext
@@ -125,6 +251,16 @@ define i64 @sextR_i64_1(i16 %x) {
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: asri16 a1, a0, 31
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i64_1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: asri16 a1, a0, 31
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i16 %x to i64
ret i64 %sext
@@ -136,6 +272,16 @@ define i64 @sextR_i64_2(i8 %x) {
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: asri16 a1, a0, 31
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i64_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: asri16 a1, a0, 31
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i8 %x to i64
ret i64 %sext
@@ -147,6 +293,17 @@ define i64 @sextR_i64_3(i1 %x) {
; CHECK-NEXT: sext32 a0, a0, 0, 0
; CHECK-NEXT: mov16 a1, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i64_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i1 %x to i64
ret i64 %sext
@@ -158,6 +315,15 @@ define i32 @sextR_i32_1(i16 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i32_1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i16 %x to i32
ret i32 %sext
@@ -168,6 +334,15 @@ define i32 @sextR_i32_2(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i32_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i8 %x to i32
ret i32 %sext
@@ -178,6 +353,16 @@ define i32 @sextR_i32_3(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sext32 a0, a0, 0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i32_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i1 %x to i32
ret i32 %sext
@@ -189,6 +374,15 @@ define i16 @sextR_i16_2(i8 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i16_2:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i8 %x to i16
ret i16 %sext
@@ -199,6 +393,16 @@ define i16 @sextR_i16_3(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sext32 a0, a0, 0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i16_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i1 %x to i16
ret i16 %sext
@@ -210,6 +414,16 @@ define i8 @sextR_i8_3(i1 %x) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sext32 a0, a0, 0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: sextR_i8_3:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%sext = sext i1 %x to i8
ret i8 %sext
diff --git a/llvm/test/CodeGen/CSKY/ldst-i.ll b/llvm/test/CodeGen/CSKY/ldst-i.ll
index bf231dba968ad..06cfc9bde655f 100644
--- a/llvm/test/CodeGen/CSKY/ldst-i.ll
+++ b/llvm/test/CodeGen/CSKY/ldst-i.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
define signext i1 @load_I_bits(i1* nocapture readonly %a) local_unnamed_addr #0 {
; CHECK-LABEL: load_I_bits:
@@ -7,6 +8,17 @@ define signext i1 @load_I_bits(i1* nocapture readonly %a) local_unnamed_addr #0
; CHECK-NEXT: ld16.b a0, (a0, 3)
; CHECK-NEXT: sext32 a0, a0, 0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_bits:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.b a0, (a0, 3)
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i1, i1* %a, i64 3
%0 = load i1, i1* %arrayidx, align 1
@@ -18,6 +30,15 @@ define zeroext i1 @load_I_bit_(i1* nocapture readonly %a) local_unnamed_addr #0
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld16.b a0, (a0, 3)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_bit_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.b a0, (a0, 3)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i1, i1* %a, i64 3
%0 = load i1, i1* %arrayidx, align 1
@@ -29,6 +50,16 @@ define signext i8 @load_I_bs(i8* nocapture readonly %a) local_unnamed_addr #0 {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld32.bs a0, (a0, 3)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_bs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.b a0, (a0, 3)
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i8, i8* %a, i64 3
%0 = load i8, i8* %arrayidx, align 1
@@ -40,6 +71,15 @@ define zeroext i8 @load_I_b_(i8* nocapture readonly %a) local_unnamed_addr #0 {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld16.b a0, (a0, 3)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_b_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.b a0, (a0, 3)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i8, i8* %a, i64 3
%0 = load i8, i8* %arrayidx, align 1
@@ -51,6 +91,16 @@ define signext i16 @load_I_hs(i16* nocapture readonly %a) local_unnamed_addr #0
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld32.hs a0, (a0, 6)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_hs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.h a0, (a0, 6)
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i16, i16* %a, i64 3
%0 = load i16, i16* %arrayidx, align 2
@@ -62,6 +112,15 @@ define zeroext i16 @load_I_h_(i16* nocapture readonly %a) local_unnamed_addr #0
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld16.h a0, (a0, 6)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_h_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.h a0, (a0, 6)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i16, i16* %a, i64 3
%0 = load i16, i16* %arrayidx, align 2
@@ -73,6 +132,15 @@ define i32 @load_I_w(i32* nocapture readonly %a) local_unnamed_addr #0 {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld16.w a0, (a0, 12)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_w:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.w a0, (a0, 12)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i32, i32* %a, i64 3
%0 = load i32, i32* %arrayidx, align 4
@@ -86,6 +154,17 @@ define i64 @load_I_d(i64* nocapture readonly %a) local_unnamed_addr #0 {
; CHECK-NEXT: ld16.w a1, (a0, 28)
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_d:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.w a2, (a0, 24)
+; GENERIC-NEXT: ld16.w a1, (a0, 28)
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i64, i64* %a, i64 3
%0 = load i64, i64* %arrayidx, align 4
@@ -97,6 +176,15 @@ define i8 @load_I_i8_anyext(i8* %p) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld16.b a0, (a0, 0)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_I_i8_anyext:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: ld16.b a0, (a0, 0)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = load i8, i8* %p, align 1
ret i8 %ret
@@ -108,6 +196,18 @@ define signext i1 @load_R_bits(i1* nocapture readonly %a, i32 %b) local_unnamed_
; CHECK-NEXT: ldr32.bs a0, (a0, a1 << 0)
; CHECK-NEXT: sext32 a0, a0, 0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_bits:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.b a0, (a0, 0)
+; GENERIC-NEXT: lsli16 a0, a0, 7
+; GENERIC-NEXT: asri16 a0, a0, 7
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i1, i1* %a, i64 %idxprom
@@ -120,6 +220,16 @@ define zeroext i1 @load_R_bit_(i1* nocapture readonly %a, i32 %b) local_unnamed_
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.b a0, (a0, a1 << 0)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_bit_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.b a0, (a0, 0)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i1, i1* %a, i64 %idxprom
@@ -133,6 +243,17 @@ define signext i8 @load_R_bs(i8* nocapture readonly %a, i32 %b) local_unnamed_ad
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.bs a0, (a0, a1 << 0)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_bs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.b a0, (a0, 0)
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i8, i8* %a, i64 %idxprom
@@ -145,6 +266,16 @@ define zeroext i8 @load_R_b_(i8* nocapture readonly %a, i32 %b) local_unnamed_ad
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.b a0, (a0, a1 << 0)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_b_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.b a0, (a0, 0)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i8, i8* %a, i64 %idxprom
@@ -157,6 +288,18 @@ define signext i16 @load_R_hs(i16* nocapture readonly %a, i32 %b) local_unnamed_
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.hs a0, (a0, a1 << 1)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_hs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 1
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.h a0, (a0, 0)
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i16, i16* %a, i64 %idxprom
@@ -169,6 +312,17 @@ define zeroext i16 @load_R_h_(i16* nocapture readonly %a, i32 %b) local_unnamed_
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.h a0, (a0, a1 << 1)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_h_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 1
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.h a0, (a0, 0)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i16, i16* %a, i64 %idxprom
@@ -181,6 +335,17 @@ define i32 @load_R_w(i32* nocapture readonly %a, i32 %b) local_unnamed_addr #0 {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.w a0, (a0, a1 << 2)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_w:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 2
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
@@ -195,6 +360,18 @@ define i64 @load_R_d(i64* nocapture readonly %a, i32 %b) local_unnamed_addr #0 {
; CHECK-NEXT: ldr32.w a0, (a0, a1 << 3)
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: load_R_d:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 3
+; GENERIC-NEXT: addu16 a1, a0, a1
+; GENERIC-NEXT: ld16.w a0, (a1, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i64, i64* %a, i64 %idxprom
@@ -207,6 +384,16 @@ define i8 @loadR_i8_anyext(i8* %c, i32 %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ldr32.bs a0, (a0, a1 << 0)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: loadR_i8_anyext:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: ld16.b a0, (a0, 0)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds i8, i8* %c, i64 %idxprom
@@ -221,6 +408,18 @@ define signext i1 @store_I_bits(i1* %a, i1 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.b a1, (a0, 3)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_bits:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a2, a1
+; GENERIC-NEXT: st16.b a2, (a0, 3)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i1, i1* %a, i64 3
store i1 %b, i1* %arrayidx, align 1
@@ -234,6 +433,18 @@ define zeroext i1 @store_I_bit_(i1* %a, i1 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.b a1, (a0, 3)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_bit_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a2, 1
+; GENERIC-NEXT: and16 a2, a1
+; GENERIC-NEXT: st16.b a2, (a0, 3)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i1, i1* %a, i64 3
store i1 %b, i1* %arrayidx, align 1
@@ -246,6 +457,16 @@ define signext i8 @store_I_bs(i8* %a, i8 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.b a1, (a0, 3)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_bs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.b a1, (a0, 3)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i8, i8* %a, i64 3
store i8 %b, i8* %arrayidx, align 1
@@ -258,6 +479,16 @@ define zeroext i8 @store_I_b_(i8* %a, i8 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.b a1, (a0, 3)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_b_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.b a1, (a0, 3)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i8, i8* %a, i64 3
store i8 %b, i8* %arrayidx, align 1
@@ -270,6 +501,16 @@ define signext i16 @store_I_hs(i16* %a, i16 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.h a1, (a0, 6)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_hs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.h a1, (a0, 6)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i16, i16* %a, i64 3
store i16 %b, i16* %arrayidx, align 2
@@ -282,6 +523,16 @@ define zeroext i16 @store_I_h_(i16* %a, i16 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.h a1, (a0, 6)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_h_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.h a1, (a0, 6)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i16, i16* %a, i64 3
store i16 %b, i16* %arrayidx, align 2
@@ -294,6 +545,16 @@ define i32 @store_I_w(i32* %a, i32 %b) local_unnamed_addr #0 {
; CHECK-NEXT: st16.w a1, (a0, 12)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_w:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w a1, (a0, 12)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i32, i32* %a, i64 3
store i32 %b, i32* %arrayidx, align 4
@@ -308,6 +569,18 @@ define i64 @store_I_d(i64* %a, i64 %b) local_unnamed_addr #0 {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_d:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w a2, (a0, 28)
+; GENERIC-NEXT: st16.w a1, (a0, 24)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%arrayidx = getelementptr inbounds i64, i64* %a, i64 3
store i64 %b, i64* %arrayidx, align 4
@@ -320,6 +593,16 @@ define i8 @store_I_i8_anyext(i8* %p, i8 %b) {
; CHECK-NEXT: st16.b a1, (a0, 0)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_I_i8_anyext:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.b a1, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
store i8 %b, i8* %p, align 1
ret i8 0
@@ -332,6 +615,19 @@ define signext i1 @store_R_bits(i1* %a, i32 %b, i1 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.b a2, (a0, a1 << 0)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_bits:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: st16.b a1, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i1, i1* %a, i64 %idxprom
@@ -346,6 +642,19 @@ define zeroext i1 @store_R_bit_(i1* %a, i32 %b, i1 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.b a2, (a0, a1 << 0)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_bit_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: and16 a1, a2
+; GENERIC-NEXT: st16.b a1, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i1, i1* %a, i64 %idxprom
@@ -360,6 +669,17 @@ define signext i8 @store_R_bs(i8* %a, i32 %b, i8 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.b a2, (a0, a1 << 0)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_bs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.b a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i8, i8* %a, i64 %idxprom
@@ -373,6 +693,17 @@ define zeroext i8 @store_R_b_(i8* %a, i32 %b, i8 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.b a2, (a0, a1 << 0)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_b_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.b a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i8, i8* %a, i64 %idxprom
@@ -386,6 +717,18 @@ define signext i16 @store_R_hs(i16* %a, i32 %b, i16 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.h a2, (a0, a1 << 1)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_hs:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 1
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.h a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i16, i16* %a, i64 %idxprom
@@ -399,6 +742,18 @@ define zeroext i16 @store_R_h_(i16* %a, i32 %b, i16 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.h a2, (a0, a1 << 1)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_h_:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 1
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.h a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i16, i16* %a, i64 %idxprom
@@ -412,6 +767,18 @@ define i32 @store_R_w(i32* %a, i32 %b, i32 %c) local_unnamed_addr #0 {
; CHECK-NEXT: str32.w a2, (a0, a1 << 2)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_w:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 2
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.w a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
@@ -428,6 +795,20 @@ define i64 @store_R_d(i64* %a, i32 %b, i64 %c) local_unnamed_addr #0 {
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: store_R_d:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: lsli16 a1, a1, 3
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.w a3, (a0, 4)
+; GENERIC-NEXT: st16.w a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: movi16 a1, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %b to i64
%arrayidx = getelementptr inbounds i64, i64* %a, i64 %idxprom
@@ -441,6 +822,17 @@ define i8 @storeR_i8_anyext(i8* %c, i32 %a, i8 %d) {
; CHECK-NEXT: str32.b a2, (a0, a1 << 0)
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: storeR_i8_anyext:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: addu16 a0, a0, a1
+; GENERIC-NEXT: st16.b a2, (a0, 0)
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds i8, i8* %c, i64 %idxprom
diff --git a/llvm/test/CodeGen/CSKY/select.ll b/llvm/test/CodeGen/CSKY/select.ll
index 416bb158f0f2d..9cacdd336357a 100644
--- a/llvm/test/CodeGen/CSKY/select.ll
+++ b/llvm/test/CodeGen/CSKY/select.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
define i32 @selectRR_eq_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-LABEL: selectRR_eq_i32:
@@ -8,6 +9,22 @@ define i32 @selectRR_eq_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_eq_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB0_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB0_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -21,6 +38,22 @@ define i32 @selectRI_eq_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_eq_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB1_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB1_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -36,6 +69,37 @@ define i32 @selectRX_eq_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_eq_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmpne16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB2_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB2_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -49,6 +113,20 @@ define i32 @selectC_eq_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_eq_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB3_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB3_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -69,6 +147,31 @@ define i64 @selectRR_eq_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a0, (a1, 0)
; CHECK-NEXT: ld16.w a1, (a1, 4)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_eq_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB4_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 4
+; GENERIC-NEXT: br32 .LBB4_3
+; GENERIC-NEXT: .LBB4_2:
+; GENERIC-NEXT: movi16 a0, 12
+; GENERIC-NEXT: .LBB4_3: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -88,6 +191,36 @@ define i64 @selectRI_eq_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: mov16 a1, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_eq_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 10
+; GENERIC-NEXT: xor16 l0, a0
+; GENERIC-NEXT: or16 l0, a1
+; GENERIC-NEXT: cmpnei16 l0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB5_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: ld16.w a2, (sp, 8)
+; GENERIC-NEXT: .LBB5_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB5_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a3, (sp, 12)
+; GENERIC-NEXT: .LBB5_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -116,6 +249,48 @@ define i64 @selectRX_eq_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_eq_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 l0, 2
+; GENERIC-NEXT: lsli16 l0, l0, 24
+; GENERIC-NEXT: movi16 l1, 217
+; GENERIC-NEXT: lsli16 l1, l1, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 241
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: xor16 l1, a0
+; GENERIC-NEXT: or16 l1, a1
+; GENERIC-NEXT: cmpnei16 l1, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB6_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: .LBB6_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB6_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB6_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -132,6 +307,26 @@ define i64 @selectC_eq_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_eq_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB7_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB7_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB7_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB7_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -147,6 +342,43 @@ define i16 @selectRR_eq_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_eq_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: lsli16 l1, l0, 24
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 255
+; GENERIC-NEXT: lsli16 l2, l1, 8
+; GENERIC-NEXT: or16 l2, l0
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: and16 a0, l2
+; GENERIC-NEXT: and16 l2, a1
+; GENERIC-NEXT: cmpne16 l2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB8_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB8_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -161,6 +393,39 @@ define i16 @selectRI_eq_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_eq_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: cmpnei16 l1, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB9_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB9_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -175,6 +440,44 @@ define i16 @selectRX_eq_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_eq_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 7
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a3
+; GENERIC-NEXT: movi16 a3, 241
+; GENERIC-NEXT: or16 a3, a0
+; GENERIC-NEXT: cmpne16 l1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB10_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB10_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -188,6 +491,20 @@ define i16 @selectC_eq_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_eq_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB11_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB11_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -203,6 +520,30 @@ define i8 @selectRR_eq_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_eq_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB12_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB12_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -217,6 +558,24 @@ define i8 @selectRI_eq_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_eq_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB13_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB13_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -231,6 +590,25 @@ define i8 @selectRX_eq_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_eq_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 241
+; GENERIC-NEXT: cmpne16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB14_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB14_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -244,6 +622,20 @@ define i8 @selectC_eq_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_eq_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB15_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB15_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -258,6 +650,21 @@ define i1 @selectRR_eq_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a3, a2
; CHECK-NEXT: mov16 a0, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_eq_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB16_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a3
+; GENERIC-NEXT: .LBB16_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -271,6 +678,20 @@ define i1 @selectRI_eq_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a1
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_eq_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB17_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: .LBB17_2: # %entry
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -284,6 +705,20 @@ define i1 @selectRX_eq_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_eq_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB18_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB18_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -297,6 +732,20 @@ define i1 @selectC_eq_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_eq_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB19_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB19_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -310,6 +759,24 @@ define i32 @selectRR_ne_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ne_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB20_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB20_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -323,6 +790,24 @@ define i32 @selectRI_ne_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ne_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmpnei16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB21_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB21_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -338,6 +823,39 @@ define i32 @selectRX_ne_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ne_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmpne16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB22_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB22_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -351,6 +869,20 @@ define i32 @selectC_ne_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ne_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB23_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB23_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -371,6 +903,33 @@ define i64 @selectRR_ne_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a0, (a1, 0)
; CHECK-NEXT: ld16.w a1, (a1, 4)
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ne_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a1, a3
+; GENERIC-NEXT: xor16 a0, a2
+; GENERIC-NEXT: or16 a0, a1
+; GENERIC-NEXT: cmpnei16 a0, 0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB24_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 4
+; GENERIC-NEXT: br32 .LBB24_3
+; GENERIC-NEXT: .LBB24_2:
+; GENERIC-NEXT: movi16 a0, 12
+; GENERIC-NEXT: .LBB24_3: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -390,6 +949,38 @@ define i64 @selectRI_ne_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: mov16 a1, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ne_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 10
+; GENERIC-NEXT: xor16 l0, a0
+; GENERIC-NEXT: or16 l0, a1
+; GENERIC-NEXT: cmpnei16 l0, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB25_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: ld16.w a2, (sp, 8)
+; GENERIC-NEXT: .LBB25_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB25_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a3, (sp, 12)
+; GENERIC-NEXT: .LBB25_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -418,6 +1009,50 @@ define i64 @selectRX_ne_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ne_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 l0, 2
+; GENERIC-NEXT: lsli16 l0, l0, 24
+; GENERIC-NEXT: movi16 l1, 217
+; GENERIC-NEXT: lsli16 l1, l1, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 241
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: xor16 l1, a0
+; GENERIC-NEXT: or16 l1, a1
+; GENERIC-NEXT: cmpnei16 l1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB26_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: .LBB26_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB26_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB26_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -434,6 +1069,26 @@ define i64 @selectC_ne_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ne_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB27_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB27_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB27_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB27_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -449,6 +1104,45 @@ define i16 @selectRR_ne_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ne_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: lsli16 l1, l0, 24
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 255
+; GENERIC-NEXT: lsli16 l2, l1, 8
+; GENERIC-NEXT: or16 l2, l0
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: and16 a0, l2
+; GENERIC-NEXT: and16 l2, a1
+; GENERIC-NEXT: cmpne16 l2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB28_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB28_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -463,6 +1157,41 @@ define i16 @selectRI_ne_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ne_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: cmpnei16 l1, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB29_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB29_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -477,6 +1206,46 @@ define i16 @selectRX_ne_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ne_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 7
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a3
+; GENERIC-NEXT: movi16 a3, 241
+; GENERIC-NEXT: or16 a3, a0
+; GENERIC-NEXT: cmpne16 l1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB30_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB30_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -490,6 +1259,20 @@ define i16 @selectC_ne_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ne_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB31_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB31_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -505,6 +1288,32 @@ define i8 @selectRR_ne_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ne_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: cmpne16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB32_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB32_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -519,6 +1328,26 @@ define i8 @selectRI_ne_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ne_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmpnei16 a3, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB33_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB33_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -533,6 +1362,27 @@ define i8 @selectRX_ne_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ne_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 241
+; GENERIC-NEXT: cmpne16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB34_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB34_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -546,6 +1396,20 @@ define i8 @selectC_ne_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ne_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB35_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB35_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -560,6 +1424,21 @@ define i1 @selectRR_ne_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ne_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: xor16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB36_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB36_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -573,6 +1452,20 @@ define i1 @selectRI_ne_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ne_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB37_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB37_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -586,6 +1479,20 @@ define i1 @selectRX_ne_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a1
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ne_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB38_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: .LBB38_2: # %entry
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -599,6 +1506,20 @@ define i1 @selectC_ne_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ne_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB39_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB39_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -612,6 +1533,22 @@ define i32 @selectRR_ugt_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ugt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB40_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB40_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -626,6 +1563,23 @@ define i32 @selectRI_ugt_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ugt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 10
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB41_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB41_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -641,6 +1595,37 @@ define i32 @selectRX_ugt_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ugt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB42_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB42_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -654,6 +1639,20 @@ define i32 @selectC_ugt_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ugt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB43_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB43_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -683,6 +1682,42 @@ define i64 @selectRR_ugt_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ugt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmphs16 a1, a3
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB44_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, l0
+; GENERIC-NEXT: .LBB44_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB44_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: movi16 a0, 8
+; GENERIC-NEXT: br32 .LBB44_5
+; GENERIC-NEXT: .LBB44_4:
+; GENERIC-NEXT: movi16 a0, 16
+; GENERIC-NEXT: .LBB44_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -713,6 +1748,47 @@ define i64 @selectRI_ugt_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ugt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 l0, 10
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB45_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB45_6
+; GENERIC-NEXT: .LBB45_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB45_4
+; GENERIC-NEXT: .LBB45_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 12)
+; GENERIC-NEXT: .LBB45_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB45_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB45_2
+; GENERIC-NEXT: .LBB45_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 8)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB45_3
+; GENERIC-NEXT: br32 .LBB45_4
entry:
%icmp = icmp ugt i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -744,6 +1820,59 @@ define i64 @selectRX_ugt_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ugt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 l0, 2
+; GENERIC-NEXT: lsli16 l0, l0, 24
+; GENERIC-NEXT: movi16 l1, 217
+; GENERIC-NEXT: lsli16 l1, l1, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 241
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: cmphs16 l1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB46_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB46_6
+; GENERIC-NEXT: .LBB46_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB46_4
+; GENERIC-NEXT: .LBB46_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB46_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB46_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB46_2
+; GENERIC-NEXT: .LBB46_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB46_3
+; GENERIC-NEXT: br32 .LBB46_4
entry:
%icmp = icmp ugt i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -760,6 +1889,26 @@ define i64 @selectC_ugt_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ugt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB47_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB47_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB47_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB47_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -775,6 +1924,43 @@ define i16 @selectRR_ugt_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ugt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: lsli16 l1, l0, 24
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 255
+; GENERIC-NEXT: lsli16 l2, l1, 8
+; GENERIC-NEXT: or16 l2, l0
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: and16 a1, l2
+; GENERIC-NEXT: and16 l2, a0
+; GENERIC-NEXT: cmphs16 l2, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB48_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB48_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -790,6 +1976,40 @@ define i16 @selectRI_ugt_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ugt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 10
+; GENERIC-NEXT: cmphs16 a0, l1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB49_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB49_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -805,6 +2025,44 @@ define i16 @selectRX_ugt_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ugt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 7
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a3
+; GENERIC-NEXT: movi16 a3, 241
+; GENERIC-NEXT: or16 a3, a0
+; GENERIC-NEXT: cmphs16 a3, l1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB50_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB50_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -818,6 +2076,20 @@ define i16 @selectC_ugt_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ugt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB51_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB51_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -833,6 +2105,30 @@ define i8 @selectRR_ugt_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ugt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB52_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB52_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -848,6 +2144,25 @@ define i8 @selectRI_ugt_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ugt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 10
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB53_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB53_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -863,6 +2178,25 @@ define i8 @selectRX_ugt_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ugt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 241
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB54_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB54_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -876,6 +2210,20 @@ define i8 @selectC_ugt_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ugt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB55_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB55_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -891,6 +2239,29 @@ define i1 @selectRR_ugt_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ugt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: bf16 .LBB56_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB56_4
+; GENERIC-NEXT: .LBB56_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB56_3: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB56_2
+; GENERIC-NEXT: .LBB56_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -904,6 +2275,20 @@ define i1 @selectRI_ugt_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ugt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB57_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB57_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -915,6 +2300,15 @@ define i1 @selectRX_ugt_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ugt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -928,6 +2322,20 @@ define i1 @selectC_ugt_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ugt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB59_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB59_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -941,6 +2349,24 @@ define i32 @selectRR_uge_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_uge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB60_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB60_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -955,6 +2381,23 @@ define i32 @selectRI_uge_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_uge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 9
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB61_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB61_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -970,6 +2413,37 @@ define i32 @selectRX_uge_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_uge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 240
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB62_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB62_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -983,6 +2457,20 @@ define i32 @selectC_uge_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_uge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB63_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB63_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -1020,6 +2508,49 @@ define i64 @selectRR_uge_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_uge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: cmphs16 a3, a1
+; GENERIC-NEXT: mvcv16 l1
+; GENERIC-NEXT: movi16 l0, 1
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB64_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 l0, l1
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bf16 .LBB64_4
+; GENERIC-NEXT: .LBB64_2:
+; GENERIC-NEXT: movi16 a0, 20
+; GENERIC-NEXT: br32 .LBB64_5
+; GENERIC-NEXT: .LBB64_3:
+; GENERIC-NEXT: subu16 l0, a0
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bt16 .LBB64_2
+; GENERIC-NEXT: .LBB64_4: # %entry
+; GENERIC-NEXT: movi16 a0, 12
+; GENERIC-NEXT: .LBB64_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1050,6 +2581,47 @@ define i64 @selectRI_uge_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_uge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 l0, 9
+; GENERIC-NEXT: cmphs16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB65_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB65_6
+; GENERIC-NEXT: .LBB65_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB65_4
+; GENERIC-NEXT: .LBB65_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 12)
+; GENERIC-NEXT: .LBB65_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB65_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB65_2
+; GENERIC-NEXT: .LBB65_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 8)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB65_3
+; GENERIC-NEXT: br32 .LBB65_4
entry:
%icmp = icmp uge i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1081,6 +2653,59 @@ define i64 @selectRX_uge_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_uge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: movi16 l0, 2
+; GENERIC-NEXT: lsli16 l0, l0, 24
+; GENERIC-NEXT: movi16 l1, 217
+; GENERIC-NEXT: lsli16 l1, l1, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 240
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: cmphs16 l1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB66_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB66_6
+; GENERIC-NEXT: .LBB66_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB66_4
+; GENERIC-NEXT: .LBB66_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB66_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB66_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a1
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB66_2
+; GENERIC-NEXT: .LBB66_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB66_3
+; GENERIC-NEXT: br32 .LBB66_4
entry:
%icmp = icmp uge i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1097,6 +2722,26 @@ define i64 @selectC_uge_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_uge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB67_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB67_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB67_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB67_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -1112,6 +2757,45 @@ define i16 @selectRR_uge_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_uge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: lsli16 l1, l0, 24
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 255
+; GENERIC-NEXT: lsli16 l2, l1, 8
+; GENERIC-NEXT: or16 l2, l0
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: and16 a0, l2
+; GENERIC-NEXT: and16 l2, a1
+; GENERIC-NEXT: cmphs16 l2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB68_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB68_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1127,6 +2811,40 @@ define i16 @selectRI_uge_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_uge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 9
+; GENERIC-NEXT: cmphs16 a0, l1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB69_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB69_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1142,6 +2860,44 @@ define i16 @selectRX_uge_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_uge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 7
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a3
+; GENERIC-NEXT: movi16 a3, 240
+; GENERIC-NEXT: or16 a3, a0
+; GENERIC-NEXT: cmphs16 a3, l1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB70_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB70_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1155,6 +2911,20 @@ define i16 @selectC_uge_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_uge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB71_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB71_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -1170,6 +2940,32 @@ define i8 @selectRR_uge_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_uge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB72_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB72_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1185,6 +2981,25 @@ define i8 @selectRI_uge_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_uge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 9
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB73_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB73_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1200,6 +3015,25 @@ define i8 @selectRX_uge_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_uge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 240
+; GENERIC-NEXT: cmphs16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB74_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB74_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1213,6 +3047,20 @@ define i8 @selectC_uge_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_uge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB75_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB75_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -1228,6 +3076,25 @@ define i1 @selectRR_uge_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: movt32 a0, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_uge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB76_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a3
+; GENERIC-NEXT: .LBB76_2: # %entry
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB76_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB76_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1239,6 +3106,15 @@ define i1 @selectRI_uge_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_uge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1252,6 +3128,20 @@ define i1 @selectRX_uge_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_uge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB78_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB78_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1265,6 +3155,20 @@ define i1 @selectC_uge_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_uge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB79_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB79_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -1278,6 +3182,22 @@ define i32 @selectRR_ult_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ult_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB80_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB80_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1291,6 +3211,22 @@ define i32 @selectRI_ult_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ult_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB81_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB81_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1306,6 +3242,37 @@ define i32 @selectRX_ult_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ult_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmphs16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB82_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB82_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1319,6 +3286,20 @@ define i32 @selectC_ult_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ult_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB83_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB83_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -1348,6 +3329,42 @@ define i64 @selectRR_ult_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ult_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmphs16 a3, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB84_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, l0
+; GENERIC-NEXT: .LBB84_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB84_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: movi16 a0, 8
+; GENERIC-NEXT: br32 .LBB84_5
+; GENERIC-NEXT: .LBB84_4:
+; GENERIC-NEXT: movi16 a0, 16
+; GENERIC-NEXT: .LBB84_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1380,6 +3397,40 @@ define i64 @selectRI_ult_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a1, a3
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ult_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB85_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB85_6
+; GENERIC-NEXT: .LBB85_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB85_4
+; GENERIC-NEXT: .LBB85_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 8)
+; GENERIC-NEXT: .LBB85_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB85_5: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB85_2
+; GENERIC-NEXT: .LBB85_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB85_3
+; GENERIC-NEXT: br32 .LBB85_4
entry:
%icmp = icmp ult i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1411,6 +3462,58 @@ define i64 @selectRX_ult_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ult_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 l0, 2
+; GENERIC-NEXT: lsli16 l0, l0, 24
+; GENERIC-NEXT: movi16 l1, 217
+; GENERIC-NEXT: lsli16 l1, l1, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 241
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: cmphs16 a0, l1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB86_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB86_6
+; GENERIC-NEXT: .LBB86_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB86_4
+; GENERIC-NEXT: .LBB86_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB86_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB86_5: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB86_2
+; GENERIC-NEXT: .LBB86_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB86_3
+; GENERIC-NEXT: br32 .LBB86_4
entry:
%icmp = icmp ult i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1427,6 +3530,26 @@ define i64 @selectC_ult_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ult_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB87_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB87_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB87_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB87_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -1442,6 +3565,43 @@ define i16 @selectRR_ult_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ult_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: lsli16 l1, l0, 24
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 255
+; GENERIC-NEXT: lsli16 l2, l1, 8
+; GENERIC-NEXT: or16 l2, l0
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: and16 a0, l2
+; GENERIC-NEXT: and16 l2, a1
+; GENERIC-NEXT: cmphs16 l2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB88_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB88_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1456,6 +3616,39 @@ define i16 @selectRI_ult_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ult_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: cmphsi16 l1, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB89_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB89_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1470,6 +3663,44 @@ define i16 @selectRX_ult_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ult_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 7
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a3
+; GENERIC-NEXT: movi16 a3, 241
+; GENERIC-NEXT: or16 a3, a0
+; GENERIC-NEXT: cmphs16 l1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB90_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB90_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1483,6 +3714,20 @@ define i16 @selectC_ult_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ult_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB91_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB91_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -1498,6 +3743,30 @@ define i8 @selectRR_ult_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ult_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: cmphs16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB92_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB92_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1512,6 +3781,24 @@ define i8 @selectRI_ult_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ult_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmphsi16 a3, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB93_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB93_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1526,6 +3813,25 @@ define i8 @selectRX_ult_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ult_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 241
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB94_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB94_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1539,6 +3845,20 @@ define i8 @selectC_ult_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ult_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB95_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB95_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -1554,6 +3874,31 @@ define i1 @selectRR_ult_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ult_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: mov16 l0, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: bt16 .LBB96_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: .LBB96_2: # %entry
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bt16 .LBB96_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: .LBB96_4: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1565,6 +3910,15 @@ define i1 @selectRI_ult_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ult_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1578,6 +3932,20 @@ define i1 @selectRX_ult_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a1
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ult_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB98_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: .LBB98_2: # %entry
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1591,6 +3959,20 @@ define i1 @selectC_ult_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ult_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB99_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB99_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -1603,6 +3985,24 @@ define i32 @selectRR_ule_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ule_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB100_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB100_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1616,6 +4016,22 @@ define i32 @selectRI_ule_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ule_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB101_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB101_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1631,6 +4047,37 @@ define i32 @selectRX_ule_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ule_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 242
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmphs16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB102_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB102_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1644,6 +4091,20 @@ define i32 @selectC_ule_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ule_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB103_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB103_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -1681,6 +4142,49 @@ define i64 @selectRR_ule_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ule_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: cmphs16 a1, a3
+; GENERIC-NEXT: mvcv16 l1
+; GENERIC-NEXT: movi16 l0, 1
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB104_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: subu16 l0, l1
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bf16 .LBB104_4
+; GENERIC-NEXT: .LBB104_2:
+; GENERIC-NEXT: movi16 a0, 20
+; GENERIC-NEXT: br32 .LBB104_5
+; GENERIC-NEXT: .LBB104_3:
+; GENERIC-NEXT: subu16 l0, a0
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bt16 .LBB104_2
+; GENERIC-NEXT: .LBB104_4: # %entry
+; GENERIC-NEXT: movi16 a0, 12
+; GENERIC-NEXT: .LBB104_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1713,6 +4217,40 @@ define i64 @selectRI_ule_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a1, a3
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ule_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB105_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB105_6
+; GENERIC-NEXT: .LBB105_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB105_4
+; GENERIC-NEXT: .LBB105_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 8)
+; GENERIC-NEXT: .LBB105_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB105_5: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB105_2
+; GENERIC-NEXT: .LBB105_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB105_3
+; GENERIC-NEXT: br32 .LBB105_4
entry:
%icmp = icmp ule i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1744,6 +4282,58 @@ define i64 @selectRX_ule_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ule_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 l0, 2
+; GENERIC-NEXT: lsli16 l0, l0, 24
+; GENERIC-NEXT: movi16 l1, 217
+; GENERIC-NEXT: lsli16 l1, l1, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 242
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: cmphs16 a0, l1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB106_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB106_6
+; GENERIC-NEXT: .LBB106_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB106_4
+; GENERIC-NEXT: .LBB106_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB106_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB106_5: # %entry
+; GENERIC-NEXT: movi16 a0, 0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB106_2
+; GENERIC-NEXT: .LBB106_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB106_3
+; GENERIC-NEXT: br32 .LBB106_4
entry:
%icmp = icmp ule i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -1760,6 +4350,26 @@ define i64 @selectC_ule_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ule_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB107_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB107_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB107_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB107_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -1775,6 +4385,45 @@ define i16 @selectRR_ule_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ule_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: lsli16 l1, l0, 24
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, l1
+; GENERIC-NEXT: movi16 l1, 255
+; GENERIC-NEXT: lsli16 l2, l1, 8
+; GENERIC-NEXT: or16 l2, l0
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: and16 a1, l2
+; GENERIC-NEXT: and16 l2, a0
+; GENERIC-NEXT: cmphs16 l2, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB108_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB108_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1789,6 +4438,39 @@ define i16 @selectRI_ule_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ule_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: cmphsi16 l1, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB109_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB109_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1803,6 +4485,44 @@ define i16 @selectRX_ule_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ule_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: lsli16 l1, l0, 8
+; GENERIC-NEXT: or16 l1, a3
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: and16 l1, a0
+; GENERIC-NEXT: movi16 a0, 7
+; GENERIC-NEXT: lsli16 a0, a0, 8
+; GENERIC-NEXT: or16 a0, a3
+; GENERIC-NEXT: movi16 a3, 242
+; GENERIC-NEXT: or16 a3, a0
+; GENERIC-NEXT: cmphs16 l1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB110_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB110_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -1816,6 +4536,20 @@ define i16 @selectC_ule_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ule_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB111_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB111_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -1831,6 +4565,32 @@ define i8 @selectRR_ule_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ule_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 255
+; GENERIC-NEXT: and16 a1, l0
+; GENERIC-NEXT: and16 a0, l0
+; GENERIC-NEXT: cmphs16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB112_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB112_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1845,6 +4605,24 @@ define i8 @selectRI_ule_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ule_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: cmphsi16 a3, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB113_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB113_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1859,6 +4637,25 @@ define i8 @selectRX_ule_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ule_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: and16 a3, a0
+; GENERIC-NEXT: movi16 a0, 242
+; GENERIC-NEXT: cmphs16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB114_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB114_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -1872,6 +4669,20 @@ define i8 @selectC_ule_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ule_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB115_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB115_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -1888,6 +4699,25 @@ define i1 @selectRR_ule_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a3
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_ule_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB116_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a3
+; GENERIC-NEXT: .LBB116_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB116_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB116_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1901,6 +4731,20 @@ define i1 @selectRI_ule_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a1
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_ule_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB117_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: .LBB117_2: # %entry
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1912,6 +4756,15 @@ define i1 @selectRX_ule_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_ule_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -1925,6 +4778,20 @@ define i1 @selectC_ule_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_ule_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB119_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB119_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -1938,6 +4805,24 @@ define i32 @selectRR_sgt_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sgt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB120_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB120_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1952,6 +4837,25 @@ define i32 @selectRI_sgt_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sgt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 10
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB121_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB121_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1967,6 +4871,39 @@ define i32 @selectRX_sgt_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sgt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB122_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB122_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -1980,6 +4917,20 @@ define i32 @selectC_sgt_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sgt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB123_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB123_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -2013,6 +4964,43 @@ define i64 @selectRR_sgt_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sgt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmplt16 a1, a3
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB124_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: .LBB124_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB124_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: movi16 a0, 8
+; GENERIC-NEXT: br32 .LBB124_5
+; GENERIC-NEXT: .LBB124_4:
+; GENERIC-NEXT: movi16 a0, 16
+; GENERIC-NEXT: .LBB124_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2055,6 +5043,53 @@ define i64 @selectRI_sgt_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sgt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 l0, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: movi16 l1, 10
+; GENERIC-NEXT: cmphs16 l1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB125_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB125_6
+; GENERIC-NEXT: .LBB125_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB125_4
+; GENERIC-NEXT: .LBB125_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB125_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB125_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB125_2
+; GENERIC-NEXT: .LBB125_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB125_3
+; GENERIC-NEXT: br32 .LBB125_4
entry:
%icmp = icmp sgt i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2098,6 +5133,65 @@ define i64 @selectRX_sgt_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sgt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 l0, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: movi16 l1, 2
+; GENERIC-NEXT: lsli16 l1, l1, 24
+; GENERIC-NEXT: movi16 l2, 217
+; GENERIC-NEXT: lsli16 l2, l2, 16
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: movi16 l1, 7
+; GENERIC-NEXT: lsli16 l1, l1, 8
+; GENERIC-NEXT: or16 l1, l2
+; GENERIC-NEXT: movi16 l2, 241
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: cmphs16 l2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB126_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB126_6
+; GENERIC-NEXT: .LBB126_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB126_4
+; GENERIC-NEXT: .LBB126_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 20)
+; GENERIC-NEXT: .LBB126_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB126_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB126_2
+; GENERIC-NEXT: .LBB126_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 16)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB126_3
+; GENERIC-NEXT: br32 .LBB126_4
entry:
%icmp = icmp sgt i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2114,6 +5208,26 @@ define i64 @selectC_sgt_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sgt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB127_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB127_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB127_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB127_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -2129,6 +5243,26 @@ define i16 @selectRR_sgt_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sgt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB128_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB128_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2144,6 +5278,26 @@ define i16 @selectRI_sgt_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sgt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a3, 10
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB129_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB129_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2159,6 +5313,39 @@ define i16 @selectRX_sgt_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sgt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 241
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB130_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB130_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2172,6 +5359,20 @@ define i16 @selectC_sgt_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sgt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB131_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB131_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -2187,6 +5388,26 @@ define i8 @selectRR_sgt_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sgt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB132_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB132_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2202,6 +5423,26 @@ define i8 @selectRI_sgt_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sgt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a3, 10
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB133_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB133_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2218,6 +5459,41 @@ define i8 @selectRX_sgt_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sgt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 l1, a3, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l1
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB134_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB134_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2231,6 +5507,20 @@ define i8 @selectC_sgt_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sgt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB135_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB135_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -2246,6 +5536,31 @@ define i1 @selectRR_sgt_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sgt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: mov16 l0, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: bt16 .LBB136_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: .LBB136_2: # %entry
+; GENERIC-NEXT: btsti16 l0, 0
+; GENERIC-NEXT: bt16 .LBB136_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: .LBB136_4: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2257,6 +5572,15 @@ define i1 @selectRI_sgt_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sgt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2270,6 +5594,20 @@ define i1 @selectRX_sgt_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a1
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sgt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB138_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: .LBB138_2: # %entry
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2283,6 +5621,20 @@ define i1 @selectC_sgt_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sgt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB139_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB139_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -2296,6 +5648,22 @@ define i32 @selectRR_sge_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB140_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB140_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -2310,6 +5678,25 @@ define i32 @selectRI_sge_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: movi16 a3, 9
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB141_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB141_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -2325,6 +5712,39 @@ define i32 @selectRX_sge_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 240
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB142_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB142_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -2338,6 +5758,20 @@ define i32 @selectC_sge_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sge_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB143_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB143_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -2371,6 +5805,38 @@ define i64 @selectRR_sge_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a1, 4)
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmplt16 a3, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB144_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB144_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB144_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: movi16 a0, 4
+; GENERIC-NEXT: br32 .LBB144_5
+; GENERIC-NEXT: .LBB144_4:
+; GENERIC-NEXT: movi16 a0, 12
+; GENERIC-NEXT: .LBB144_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2413,6 +5879,53 @@ define i64 @selectRI_sge_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 l0, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: movi16 l1, 9
+; GENERIC-NEXT: cmphs16 l1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB145_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB145_6
+; GENERIC-NEXT: .LBB145_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB145_4
+; GENERIC-NEXT: .LBB145_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 16)
+; GENERIC-NEXT: .LBB145_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB145_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB145_2
+; GENERIC-NEXT: .LBB145_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 12)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB145_3
+; GENERIC-NEXT: br32 .LBB145_4
entry:
%icmp = icmp sge i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2456,6 +5969,65 @@ define i64 @selectRX_sge_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 l0, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: movi16 l1, 2
+; GENERIC-NEXT: lsli16 l1, l1, 24
+; GENERIC-NEXT: movi16 l2, 217
+; GENERIC-NEXT: lsli16 l2, l2, 16
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: movi16 l1, 7
+; GENERIC-NEXT: lsli16 l1, l1, 8
+; GENERIC-NEXT: or16 l1, l2
+; GENERIC-NEXT: movi16 l2, 240
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: cmphs16 l2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB146_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB146_6
+; GENERIC-NEXT: .LBB146_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB146_4
+; GENERIC-NEXT: .LBB146_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 20)
+; GENERIC-NEXT: .LBB146_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB146_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB146_2
+; GENERIC-NEXT: .LBB146_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 16)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB146_3
+; GENERIC-NEXT: br32 .LBB146_4
entry:
%icmp = icmp sge i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2472,6 +6044,26 @@ define i64 @selectC_sge_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sge_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB147_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB147_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB147_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB147_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -2487,6 +6079,24 @@ define i16 @selectRR_sge_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB148_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB148_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2502,6 +6112,26 @@ define i16 @selectRI_sge_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a3, 9
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB149_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB149_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2517,6 +6147,39 @@ define i16 @selectRX_sge_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 240
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB150_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB150_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2530,6 +6193,20 @@ define i16 @selectC_sge_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sge_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB151_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB151_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -2545,6 +6222,24 @@ define i8 @selectRR_sge_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB152_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB152_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2560,6 +6255,26 @@ define i8 @selectRI_sge_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a3, 9
+; GENERIC-NEXT: cmplt16 a3, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB153_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB153_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2576,6 +6291,41 @@ define i8 @selectRX_sge_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 l1, a3, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l1
+; GENERIC-NEXT: movi16 l0, 240
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 l0, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB154_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB154_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2589,6 +6339,20 @@ define i8 @selectC_sge_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sge_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB155_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB155_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -2605,6 +6369,25 @@ define i1 @selectRR_sge_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a3
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB156_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a3
+; GENERIC-NEXT: .LBB156_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB156_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB156_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2618,6 +6401,20 @@ define i1 @selectRI_sge_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a1
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB157_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: .LBB157_2: # %entry
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2629,6 +6426,15 @@ define i1 @selectRX_sge_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2642,6 +6448,20 @@ define i1 @selectC_sge_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sge_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB159_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB159_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -2655,6 +6475,24 @@ define i32 @selectRR_slt_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_slt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB160_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB160_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -2668,6 +6506,24 @@ define i32 @selectRI_slt_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_slt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB161_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB161_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -2683,6 +6539,39 @@ define i32 @selectRX_slt_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_slt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB162_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB162_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -2696,6 +6585,20 @@ define i32 @selectC_slt_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_slt_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB163_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB163_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -2729,6 +6632,43 @@ define i64 @selectRR_slt_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a2, 4)
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_slt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: cmplt16 a3, a1
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphs16 a2, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB164_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: .LBB164_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB164_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: movi16 a0, 8
+; GENERIC-NEXT: br32 .LBB164_5
+; GENERIC-NEXT: .LBB164_4:
+; GENERIC-NEXT: movi16 a0, 16
+; GENERIC-NEXT: .LBB164_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2770,6 +6710,49 @@ define i64 @selectRI_slt_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_slt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 a1, l0
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphsi16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB165_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB165_6
+; GENERIC-NEXT: .LBB165_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB165_4
+; GENERIC-NEXT: .LBB165_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 12)
+; GENERIC-NEXT: .LBB165_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB165_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB165_2
+; GENERIC-NEXT: .LBB165_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 8)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB165_3
+; GENERIC-NEXT: br32 .LBB165_4
entry:
%icmp = icmp slt i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2813,6 +6796,65 @@ define i64 @selectRX_slt_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_slt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 a1, l0
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: movi16 l1, 2
+; GENERIC-NEXT: lsli16 l1, l1, 24
+; GENERIC-NEXT: movi16 l2, 217
+; GENERIC-NEXT: lsli16 l2, l2, 16
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: movi16 l1, 7
+; GENERIC-NEXT: lsli16 l1, l1, 8
+; GENERIC-NEXT: or16 l1, l2
+; GENERIC-NEXT: movi16 l2, 241
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: cmphs16 a0, l2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB166_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB166_6
+; GENERIC-NEXT: .LBB166_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB166_4
+; GENERIC-NEXT: .LBB166_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 20)
+; GENERIC-NEXT: .LBB166_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB166_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB166_2
+; GENERIC-NEXT: .LBB166_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 16)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB166_3
+; GENERIC-NEXT: br32 .LBB166_4
entry:
%icmp = icmp slt i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -2829,6 +6871,26 @@ define i64 @selectC_slt_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_slt_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB167_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB167_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB167_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB167_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -2844,6 +6906,26 @@ define i16 @selectRR_slt_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_slt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB168_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB168_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2858,6 +6940,25 @@ define i16 @selectRI_slt_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_slt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB169_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB169_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2872,6 +6973,39 @@ define i16 @selectRX_slt_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_slt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 241
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: cmplt16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB170_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB170_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -2885,6 +7019,20 @@ define i16 @selectC_slt_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_slt_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB171_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB171_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -2900,6 +7048,26 @@ define i8 @selectRR_slt_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_slt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: cmplt16 a1, a0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a1, 1
+; GENERIC-NEXT: subu16 a1, a0
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB172_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB172_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2914,6 +7082,25 @@ define i8 @selectRI_slt_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_slt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 10
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB173_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB173_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2930,6 +7117,41 @@ define i8 @selectRX_slt_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_slt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 l1, a3, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l1
+; GENERIC-NEXT: movi16 l0, 241
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB174_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB174_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -2943,6 +7165,20 @@ define i8 @selectC_slt_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_slt_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB175_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB175_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -2958,6 +7194,29 @@ define i1 @selectRR_slt_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_slt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: bf16 .LBB176_3
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB176_4
+; GENERIC-NEXT: .LBB176_2: # %entry
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB176_3: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB176_2
+; GENERIC-NEXT: .LBB176_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2971,6 +7230,20 @@ define i1 @selectRI_slt_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_slt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB177_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB177_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2982,6 +7255,15 @@ define i1 @selectRX_slt_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_slt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a1
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -2995,6 +7277,20 @@ define i1 @selectC_slt_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_slt_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB179_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB179_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
@@ -3007,6 +7303,22 @@ define i32 @selectRR_sle_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sle_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB180_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB180_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %y, %x
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -3020,6 +7332,24 @@ define i32 @selectRI_sle_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sle_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB181_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB181_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %x, 10
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -3035,6 +7365,39 @@ define i32 @selectRX_sle_i32(i32 %x, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sle_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 a3, 2
+; GENERIC-NEXT: lsli16 a3, a3, 24
+; GENERIC-NEXT: movi16 l0, 217
+; GENERIC-NEXT: lsli16 l0, l0, 16
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 7
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 242
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB182_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB182_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %x, 47777777
%ret = select i1 %icmp, i32 %m, i32 %n
@@ -3048,6 +7411,20 @@ define i32 @selectC_sle_i32(i1 %c, i32 %n, i32 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sle_i32:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB183_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB183_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i32 %m, i32 %n
ret i32 %ret
@@ -3081,6 +7458,38 @@ define i64 @selectRR_sle_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w a1, (a1, 4)
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sle_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: cmphs16 a0, a2
+; GENERIC-NEXT: mvcv16 a2
+; GENERIC-NEXT: cmplt16 a1, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpne16 a3, a1
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB184_2
+; GENERIC-NEXT: # %bb.1:
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, a2
+; GENERIC-NEXT: .LBB184_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB184_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: movi16 a0, 4
+; GENERIC-NEXT: br32 .LBB184_5
+; GENERIC-NEXT: .LBB184_4:
+; GENERIC-NEXT: movi16 a0, 12
+; GENERIC-NEXT: .LBB184_5: # %entry
+; GENERIC-NEXT: addu16 a0, sp
+; GENERIC-NEXT: mov16 a1, a0
+; GENERIC-NEXT: ld16.w a0, (a0, 0)
+; GENERIC-NEXT: ld16.w a1, (a1, 4)
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i64 %y, %x
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -3122,6 +7531,49 @@ define i64 @selectRI_sle_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sle_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 a1, l0
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: cmphsi16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB185_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB185_6
+; GENERIC-NEXT: .LBB185_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB185_4
+; GENERIC-NEXT: .LBB185_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 12)
+; GENERIC-NEXT: .LBB185_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB185_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB185_2
+; GENERIC-NEXT: .LBB185_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 8)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB185_3
+; GENERIC-NEXT: br32 .LBB185_4
entry:
%icmp = icmp sle i64 %x, 10
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -3165,6 +7617,65 @@ define i64 @selectRX_sle_i64(i64 %x, i64 %n, i64 %m) {
; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT: addi16 sp, sp, 4
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sle_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 12
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l2, -4
+; GENERIC-NEXT: .cfi_offset l1, -8
+; GENERIC-NEXT: .cfi_offset l0, -12
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 16
+; GENERIC-NEXT: movi16 l0, 0
+; GENERIC-NEXT: cmplt16 a1, l0
+; GENERIC-NEXT: mvcv16 l0
+; GENERIC-NEXT: movi16 l1, 2
+; GENERIC-NEXT: lsli16 l1, l1, 24
+; GENERIC-NEXT: movi16 l2, 217
+; GENERIC-NEXT: lsli16 l2, l2, 16
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: movi16 l1, 7
+; GENERIC-NEXT: lsli16 l1, l1, 8
+; GENERIC-NEXT: or16 l1, l2
+; GENERIC-NEXT: movi16 l2, 242
+; GENERIC-NEXT: or16 l2, l1
+; GENERIC-NEXT: cmphs16 a0, l2
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: cmpnei16 a1, 0
+; GENERIC-NEXT: mvcv16 a1
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bf16 .LBB186_5
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB186_6
+; GENERIC-NEXT: .LBB186_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB186_4
+; GENERIC-NEXT: .LBB186_3:
+; GENERIC-NEXT: ld16.w a3, (sp, 20)
+; GENERIC-NEXT: .LBB186_4: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: mov16 a1, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 12
+; GENERIC-NEXT: rts16
+; GENERIC-NEXT: .LBB186_5: # %entry
+; GENERIC-NEXT: movi16 a0, 1
+; GENERIC-NEXT: subu16 a0, l0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB186_2
+; GENERIC-NEXT: .LBB186_6:
+; GENERIC-NEXT: ld16.w a2, (sp, 16)
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB186_3
+; GENERIC-NEXT: br32 .LBB186_4
entry:
%icmp = icmp sle i64 %x, 47777777
%ret = select i1 %icmp, i64 %m, i64 %n
@@ -3181,6 +7692,26 @@ define i64 @selectC_sle_i64(i1 %c, i64 %n, i64 %m) {
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: mov16 a1, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sle_i64:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB187_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a1
+; GENERIC-NEXT: .LBB187_2: # %entry
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bf16 .LBB187_4
+; GENERIC-NEXT: # %bb.3:
+; GENERIC-NEXT: ld16.w a2, (sp, 4)
+; GENERIC-NEXT: .LBB187_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: mov16 a1, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i64 %m, i64 %n
ret i64 %ret
@@ -3196,6 +7727,24 @@ define i16 @selectRR_sle_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sle_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a1, a1
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB188_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB188_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %y, %x
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -3210,6 +7759,25 @@ define i16 @selectRI_sle_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sle_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB189_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB189_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %x, 10
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -3224,6 +7792,39 @@ define i16 @selectRX_sle_i16(i16 %x, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sle_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l0, -4
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: sexth16 a0, a0
+; GENERIC-NEXT: movi16 a3, 0
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 a3, a3, 16
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: movi16 l0, 7
+; GENERIC-NEXT: lsli16 l0, l0, 8
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: movi16 a3, 242
+; GENERIC-NEXT: or16 a3, l0
+; GENERIC-NEXT: cmplt16 a0, a3
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB190_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB190_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %x, 47777777
%ret = select i1 %icmp, i16 %m, i16 %n
@@ -3237,6 +7838,20 @@ define i16 @selectC_sle_i16(i1 %c, i16 %n, i16 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sle_i16:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB191_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB191_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i16 %m, i16 %n
ret i16 %ret
@@ -3252,6 +7867,24 @@ define i8 @selectRR_sle_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
; CHECK-NEXT: movf32 a2, a3
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sle_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a1, a1
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplt16 a0, a1
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB192_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB192_2: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %y, %x
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -3266,6 +7899,25 @@ define i8 @selectRI_sle_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sle_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: cmplti16 a0, 11
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB193_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB193_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %x, 10
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -3282,6 +7934,41 @@ define i8 @selectRX_sle_i8(i8 %x, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sle_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: subi16 sp, sp, 8
+; GENERIC-NEXT: .cfi_def_cfa_offset 8
+; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
+; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
+; GENERIC-NEXT: .cfi_offset l1, -4
+; GENERIC-NEXT: .cfi_offset l0, -8
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 12
+; GENERIC-NEXT: sextb16 a0, a0
+; GENERIC-NEXT: movi16 a3, 255
+; GENERIC-NEXT: lsli16 l0, a3, 24
+; GENERIC-NEXT: lsli16 l1, a3, 16
+; GENERIC-NEXT: or16 l1, l0
+; GENERIC-NEXT: lsli16 a3, a3, 8
+; GENERIC-NEXT: or16 a3, l1
+; GENERIC-NEXT: movi16 l0, 242
+; GENERIC-NEXT: or16 l0, a3
+; GENERIC-NEXT: cmplt16 a0, l0
+; GENERIC-NEXT: mvcv16 a0
+; GENERIC-NEXT: movi16 a3, 1
+; GENERIC-NEXT: subu16 a3, a0
+; GENERIC-NEXT: btsti16 a3, 0
+; GENERIC-NEXT: bt16 .LBB194_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB194_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
+; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
+; GENERIC-NEXT: addi16 sp, sp, 8
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %x, 47777777
%ret = select i1 %icmp, i8 %m, i8 %n
@@ -3295,6 +7982,20 @@ define i8 @selectC_sle_i8(i1 %c, i8 %n, i8 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sle_i8:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB195_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB195_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i8 %m, i8 %n
ret i8 %ret
@@ -3310,6 +8011,25 @@ define i1 @selectRR_sle_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: movt32 a0, a3
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRR_sle_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB196_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a3
+; GENERIC-NEXT: .LBB196_2: # %entry
+; GENERIC-NEXT: btsti16 a1, 0
+; GENERIC-NEXT: bt16 .LBB196_4
+; GENERIC-NEXT: # %bb.3: # %entry
+; GENERIC-NEXT: mov16 a3, a2
+; GENERIC-NEXT: .LBB196_4: # %entry
+; GENERIC-NEXT: mov16 a0, a3
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %y, %x
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -3321,6 +8041,15 @@ define i1 @selectRI_sle_i1(i1 %x, i1 %n, i1 %m) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mov16 a0, a2
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRI_sle_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %x, 10
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -3334,6 +8063,20 @@ define i1 @selectRX_sle_i1(i1 %x, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectRX_sle_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB198_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB198_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %x, 47777777
%ret = select i1 %icmp, i1 %m, i1 %n
@@ -3347,6 +8090,20 @@ define i1 @selectC_sle_i1(i1 %c, i1 %n, i1 %m) {
; CHECK-NEXT: movt32 a1, a2
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: rts16
+;
+; GENERIC-LABEL: selectC_sle_i1:
+; GENERIC: # %bb.0: # %entry
+; GENERIC-NEXT: .cfi_def_cfa_offset 0
+; GENERIC-NEXT: subi16 sp, sp, 4
+; GENERIC-NEXT: .cfi_def_cfa_offset 4
+; GENERIC-NEXT: btsti16 a0, 0
+; GENERIC-NEXT: bt16 .LBB199_2
+; GENERIC-NEXT: # %bb.1: # %entry
+; GENERIC-NEXT: mov16 a2, a1
+; GENERIC-NEXT: .LBB199_2: # %entry
+; GENERIC-NEXT: mov16 a0, a2
+; GENERIC-NEXT: addi16 sp, sp, 4
+; GENERIC-NEXT: rts16
entry:
%ret = select i1 %c, i1 %m, i1 %n
ret i1 %ret
diff --git a/llvm/test/MC/CSKY/branch-relax-801.s b/llvm/test/MC/CSKY/branch-relax-801.s
index 87a51cd947402..2e93c74595134 100644
--- a/llvm/test/MC/CSKY/branch-relax-801.s
+++ b/llvm/test/MC/CSKY/branch-relax-801.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -filetype=obj -triple=csky -mcpu=ck801 < %s \
+# RUN: llvm-mc -filetype=obj -triple=csky < %s \
# RUN: | llvm-objdump --mattr=+e1 --no-show-raw-insn -M no-aliases -d -r - \
# RUN: | FileCheck -check-prefixes=CHECK-OBJ-CK801 %s
# RUN: llvm-mc -filetype=obj -triple=csky -mcpu=ck802 < %s \
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