[PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 28 22:26:01 PDT 2022
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM with that change.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:355
+// A 12-bit signed immediate sub one and exclude zero
+def simm12_sub1_nonzero : PatLeaf<(imm), [{
+ if (!N->hasOneUse())
----------------
Use `minus1` instead of `sub1` to match better with the `plus1` PatFrag abobe.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122051/new/
https://reviews.llvm.org/D122051
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