[PATCH] D121575: [RISCV] Add computeKnownBits support for RISCVISD::GORC.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 28 16:56:55 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG01203918d1c4: [RISCV] Add computeKnownBits support for RISCVISD::GORC. (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D121575?vs=415016&id=418736#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121575/new/

https://reviews.llvm.org/D121575

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll

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