[PATCH] D119720: [ARM] Pass for Cortex-A57 and Cortex-A72 Fused AES Erratum

Mon Mar 28 07:13:32 PDT 2022

lenary added a comment.

In D119720#3339855 <https://reviews.llvm.org/D119720#3339855>, @dmgreen wrote:

> I have a high level question regarding RDF, as I've not seen it used in many other places, so it may be under-tested on Arm systems at the moment. This currently, for all code, builds an rdf graph, analyze the rdf graph for a fairly rare instructions, then fixes up the code based on that.  It might be best to avoid the (possibly expensive?) rdf graph generation for the common case where the instructions are not present. Check that the instruction exists first.

I haven't had time to see what effect this has on compile times, but I don't see the point in iterating over every instruction in the function checking the opcode, to then iterate over them all constructing the rdfgraph, that seems to make the approach a lot more expensive, if I'm then going to iterate over the rdfgraph looking for specific instructions again.

> It might then be simpler to just search back for the def of a register, considering in most code the instruction we are looking for should be fairly rare and we won't expect to need to find def's in bulk. That might be simpler overall, and avoid some of the difficulties of RDF.

The reason for using the rdfgraph was to allow us to improve this at a later date if we found the performance issues a problem, i.e. by hoisting the `vorr` past phis so we can save on executing them in loops. Given the issues with rdfgraph, I'm going to reimplement this as a Block-local analysis and fixup pass without the rdfgraph, which is effectively what the pass does in the current patch.

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