[PATCH] D122581: RegAllocGreedy: Remove redundant check for virtual registers

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 28 06:14:13 PDT 2022


arsenm created this revision.
arsenm added reviewers: qcolombet, MatzeB.
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arsenm requested review of this revision.
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The set of interfering virtual registers obviously only includes
virtual registers.


https://reviews.llvm.org/D122581

Files:
  llvm/lib/CodeGen/RegAllocGreedy.cpp


Index: llvm/lib/CodeGen/RegAllocGreedy.cpp
===================================================================
--- llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -461,9 +461,6 @@
       if (!Intf->overlaps(Start, End))
         continue;
 
-      // Cannot evict non virtual reg interference.
-      if (!Register::isVirtualRegister(Intf->reg()))
-        return false;
       // Never evict spill products. They cannot split or spill.
       if (ExtraInfo->getStage(*Intf) == RS_Done)
         return false;


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