[PATCH] D121982: [Xcore] Set Int_MemBarrier as a meta-instruction

[Kan Shengchen via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGea9139fe1666: [Xcore] Set Int_MemBarrier as a meta-instruction (authored by skan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121982/new/

https://reviews.llvm.org/D121982

Files:
  llvm/lib/Target/XCore/XCoreInstrInfo.td
  llvm/test/DebugInfo/XCore/dwarf-mem-barrier.ll
  llvm/test/DebugInfo/XCore/lit.local.cfg


Index: llvm/test/DebugInfo/XCore/lit.local.cfg
===================================================================
--- /dev/null
+++ llvm/test/DebugInfo/XCore/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'XCore' in config.root.targets:
+    config.unsupported = True
Index: llvm/test/DebugInfo/XCore/dwarf-mem-barrier.ll
===================================================================
--- /dev/null
+++ llvm/test/DebugInfo/XCore/dwarf-mem-barrier.ll
@@ -0,0 +1,32 @@
+; Check .loc directive is emitted at correct position
+; RUN: llc -O0 -mtriple xcore-linux-gnu <%s | FileCheck %s
+
+; CHECK:	#MEMBARRIER
+; CHECK:	#MEMBARRIER
+; CHECK:	ldc r0, 0
+; CHECK:	stw r0, sp[0]
+; CHECK:	.loc	1 1 14 prologue_end             # none.c:1:14
+
+define dso_local i32 @main() !dbg !7 {
+entry:
+  fence acquire, !dbg !9
+  fence release, !dbg !9
+  %retval = alloca i32, align 4
+  store i32 0, i32* %retval, align 4
+  ret i32 0, !dbg !9
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4, !5}
+!llvm.ident = !{!6}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: DebugDirectivesOnly, enums: !2, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "none.c", directory: "/temp")
+!2 = !{}
+!3 = !{i32 2, !"Tracing", i32 1}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{i32 1, !"wchar_size", i32 4}
+!6 = !{!"clang version 11.0.0"}
+!7 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 1, type: !8, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
+!8 = !DISubroutineType(types: !2)
+!9 = !DILocation(line: 1, column: 14, scope: !7)
Index: llvm/lib/Target/XCore/XCoreInstrInfo.td
===================================================================
--- llvm/lib/Target/XCore/XCoreInstrInfo.td
+++ llvm/lib/Target/XCore/XCoreInstrInfo.td
@@ -363,7 +363,7 @@
                                  (select GRRegs:$cond, GRRegs:$T, GRRegs:$F))]>;
 }
 
-let hasSideEffects = 1 in
+let hasSideEffects = 1, isMeta = 1 in
 def Int_MemBarrier : PseudoInstXCore<(outs), (ins), "#MEMBARRIER",
                                      [(XCoreMemBarrier)]>;
 


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