[PATCH] D122063: [X86] Simplify function isDataInvariant by using X86MnemonicTables
Kan Shengchen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 19 01:25:46 PDT 2022
skan added a comment.
In D122063#3393976 <https://reviews.llvm.org/D122063#3393976>, @craig.topper wrote:
> I'm slightly worried about IMUL16/32/64r because it writes EAX/EDX. No other instruction in the list has a physical register output.
This function is added by @chandlerc in D44824 <https://reviews.llvm.org/D44824>. According the description of the function
> Returns true if the instruction has no behavior (specified or otherwise)
> that is based on the value of any of its register operands
I believe it doesn't matter the instruction has a physical register output.
================
Comment at: llvm/test/CodeGen/X86/speculative-load-hardening.ll:82
; X64-NEXT: addl (%r14), %ecx
+; X64-NEXT: orl %eax, %ecx
; X64-NEXT: movslq %ecx, %rdi
----------------
craig.topper wrote:
> What instruction addition caused this change?
It was casued by the missing isMOVSXD.
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https://reviews.llvm.org/D122063/new/
https://reviews.llvm.org/D122063
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