[PATCH] D122063: [X86] Simplify function isDataInvariant by using X86MnemonicTables

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I'm slightly worried about IMUL16/32/64r because it writes EAX/EDX. No other instruction in the list has a physical register output.



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Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:402
   // register constraint anyways.
-  case X86::MOVSX16rr8:
-  case X86::MOVSX32rr8:
----------------
Some of these are in isMOVSXD not isMOVSX


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Comment at: llvm/test/CodeGen/X86/speculative-load-hardening.ll:82
 ; X64-NEXT:    addl (%r14), %ecx
+; X64-NEXT:    orl %eax, %ecx
 ; X64-NEXT:    movslq %ecx, %rdi
----------------
What instruction addition caused this change?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122063/new/

https://reviews.llvm.org/D122063