[PATCH] D122051: [RISCV] The immediate version of sgt lowering to slti + xori

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D122051#3393725 <https://reviews.llvm.org/D122051#3393725>, @jrtc27 wrote:

> There's a whole set of these you could do; why this one in particular? And what about it makes it RV32-specific?

Agreed, I'd at least expect the same for setugt.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:354
 
+// A 12-bit signed immediate sub one where the imm range will be -2049~2046.
+def simm12_sub1 : ImmLeaf<XLenVT,
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Can we use [-2049, 2046] to describe the range like the comments on AddiPair? That's a more common way to represent a range. The ~ character in there is weird. Please update the comment on simm12_plus1 as well.


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