[PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 18 11:35:58 PDT 2022
efriedma added a comment.
Having RISCVVXRMRegister work per-basic-block is fine for now, but you probably want the capability to hoist the operations out of loops at some point.
Do you have any plan for the vxsat bit? You might want the intrinsics to take it as an explicit argument/return value. Or maybe if you don't expect users of the intrinsics to use the bit, you could just preserve it; instead of saving/restoring vxrm, just save/restore all of vcsr.
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https://reviews.llvm.org/D121376/new/
https://reviews.llvm.org/D121376
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