[llvm] 1f001b2 - [InstCombine] add tests for bswap with shifted operand; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2022-03-18T11:22:15-04:00
New Revision: 1f001b25f14e0b200ea3ded85e7bd3c046ad0a91

URL: https://github.com/llvm/llvm-project/commit/1f001b25f14e0b200ea3ded85e7bd3c046ad0a91
DIFF: https://github.com/llvm/llvm-project/commit/1f001b25f14e0b200ea3ded85e7bd3c046ad0a91.diff

LOG: [InstCombine] add tests for bswap with shifted operand; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/bswap-fold.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/bswap-fold.ll b/llvm/test/Transforms/InstCombine/bswap-fold.ll
index 7c33022df533a..4e709e5e72392 100644
--- a/llvm/test/Transforms/InstCombine/bswap-fold.ll
+++ b/llvm/test/Transforms/InstCombine/bswap-fold.ll
@@ -3,27 +3,152 @@
 
 ; rdar://5992453
 ; A & 255
-define i32 @test4(i32 %a) nounwind  {
+define i32 @test4(i32 %a) {
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:    [[T2:%.*]] = and i32 [[A:%.*]], 255
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
-  %t2 = tail call i32 @llvm.bswap.i32( i32 %a )
+  %t2 = call i32 @llvm.bswap.i32( i32 %a )
   %t4 = lshr i32 %t2, 24
   ret i32 %t4
 }
 
 ; a >> 24
-define i32 @test6(i32 %a) nounwind {
+define i32 @test6(i32 %a) {
 ; CHECK-LABEL: @test6(
 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[A:%.*]], 24
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
-  %t2 = tail call i32 @llvm.bswap.i32( i32 %a )
+  %t2 = call i32 @llvm.bswap.i32( i32 %a )
   %t4 = and i32 %t2, 255
   ret i32 %t4
 }
 
+define i32 @lshr8_i32(i32 %x) {
+; CHECK-LABEL: @lshr8_i32(
+; CHECK-NEXT:    [[S:%.*]] = lshr i32 [[X:%.*]], 8
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.bswap.i32(i32 [[S]])
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = lshr i32 %x, 8
+  %r = call i32 @llvm.bswap.i32(i32 %s)
+  ret i32 %r
+}
+
+define <2 x i32> @lshr16_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @lshr16_v2i32(
+; CHECK-NEXT:    [[S:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 16, i32 16>
+; CHECK-NEXT:    [[R:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[S]])
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %s = lshr <2 x i32> %x, <i32 16, i32 16>
+  %r = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %s)
+  ret <2 x i32> %r
+}
+
+define i32 @lshr24_i32(i32 %x) {
+; CHECK-LABEL: @lshr24_i32(
+; CHECK-NEXT:    [[S:%.*]] = and i32 [[X:%.*]], -16777216
+; CHECK-NEXT:    ret i32 [[S]]
+;
+  %s = lshr i32 %x, 24
+  %r = call i32 @llvm.bswap.i32(i32 %s)
+  ret i32 %r
+}
+
+define i32 @lshr12_i32(i32 %x) {
+; CHECK-LABEL: @lshr12_i32(
+; CHECK-NEXT:    [[S:%.*]] = lshr i32 [[X:%.*]], 12
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.bswap.i32(i32 [[S]])
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = lshr i32 %x, 12
+  %r = call i32 @llvm.bswap.i32(i32 %s)
+  ret i32 %r
+}
+
+define i32 @lshr8_i32_use(i32 %x, i32* %p) {
+; CHECK-LABEL: @lshr8_i32_use(
+; CHECK-NEXT:    [[S:%.*]] = lshr i32 [[X:%.*]], 12
+; CHECK-NEXT:    store i32 [[S]], i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.bswap.i32(i32 [[S]])
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = lshr i32 %x, 12
+  store i32 %s, i32* %p
+  %r = call i32 @llvm.bswap.i32(i32 %s)
+  ret i32 %r
+}
+
+define i64 @shl16_i64(i64 %x) {
+; CHECK-LABEL: @shl16_i64(
+; CHECK-NEXT:    [[S:%.*]] = shl i64 [[X:%.*]], 16
+; CHECK-NEXT:    [[R:%.*]] = call i64 @llvm.bswap.i64(i64 [[S]])
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %s = shl i64 %x, 16
+  %r = call i64 @llvm.bswap.i64(i64 %s)
+  ret i64 %r
+}
+
+define <2 x i64> @shl16_v2i64(<2 x i64> %x) {
+; CHECK-LABEL: @shl16_v2i64(
+; CHECK-NEXT:    [[S:%.*]] = shl <2 x i64> [[X:%.*]], <i64 poison, i64 24>
+; CHECK-NEXT:    [[R:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[S]])
+; CHECK-NEXT:    ret <2 x i64> [[R]]
+;
+  %s = shl <2 x i64> %x, <i64 poison, i64 24>
+  %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %s)
+  ret <2 x i64> %r
+}
+
+define i64 @shl56_i64(i64 %x) {
+; CHECK-LABEL: @shl56_i64(
+; CHECK-NEXT:    [[S:%.*]] = and i64 [[X:%.*]], 255
+; CHECK-NEXT:    ret i64 [[S]]
+;
+  %s = shl i64 %x, 56
+  %r = call i64 @llvm.bswap.i64(i64 %s)
+  ret i64 %r
+}
+
+define i64 @shl42_i64(i64 %x) {
+; CHECK-LABEL: @shl42_i64(
+; CHECK-NEXT:    [[S:%.*]] = shl i64 [[X:%.*]], 42
+; CHECK-NEXT:    [[R:%.*]] = call i64 @llvm.bswap.i64(i64 [[S]])
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %s = shl i64 %x, 42
+  %r = call i64 @llvm.bswap.i64(i64 %s)
+  ret i64 %r
+}
+
+define i32 @shl8_i32_use(i32 %x, i32* %p) {
+; CHECK-LABEL: @shl8_i32_use(
+; CHECK-NEXT:    [[S:%.*]] = shl i32 [[X:%.*]], 8
+; CHECK-NEXT:    store i32 [[S]], i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.bswap.i32(i32 [[S]])
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = shl i32 %x, 8
+  store i32 %s, i32* %p
+  %r = call i32 @llvm.bswap.i32(i32 %s)
+  ret i32 %r
+}
+
+define i64 @swap_shl16_i64(i64 %x) {
+; CHECK-LABEL: @swap_shl16_i64(
+; CHECK-NEXT:    [[B:%.*]] = call i64 @llvm.bswap.i64(i64 [[X:%.*]])
+; CHECK-NEXT:    [[S:%.*]] = shl i64 [[B]], 16
+; CHECK-NEXT:    [[R:%.*]] = call i64 @llvm.bswap.i64(i64 [[S]])
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %b = call i64 @llvm.bswap.i64(i64 %x)
+  %s = shl i64 %b, 16
+  %r = call i64 @llvm.bswap.i64(i64 %s)
+  ret i64 %r
+}
+
 ; PR5284
 define i16 @test7(i32 %A) {
 ; CHECK-LABEL: @test7(