[llvm] ec49c84 - [gn build] (manually) port a954ade8ed4 (gen X86GenMnemonicTables.inc)

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2022-03-18T08:42:50-04:00
New Revision: ec49c84fb98ee6bfcacde23522c3a25f8f499915

URL: https://github.com/llvm/llvm-project/commit/ec49c84fb98ee6bfcacde23522c3a25f8f499915
DIFF: https://github.com/llvm/llvm-project/commit/ec49c84fb98ee6bfcacde23522c3a25f8f499915.diff

LOG: [gn build] (manually) port a954ade8ed4 (gen X86GenMnemonicTables.inc)

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn
index d0fb42d96f198..f36543c64174b 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn
@@ -21,6 +21,15 @@ tablegen("X86GenInstrInfo") {
   td_file = "../X86.td"
 }
 
+tablegen("X86GenMnemonicTables") {
+  visibility = [ ":MCTargetDesc" ]
+  args = [
+    "-gen-x86-mnemonic-tables",
+    "-asmwriternum=1",
+  ]
+  td_file = "../X86.td"
+}
+
 tablegen("X86GenRegisterInfo") {
   visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
@@ -41,6 +50,7 @@ static_library("MCTargetDesc") {
   # should be in deps instead.
   public_deps = [
     ":X86GenInstrInfo",
+    ":X86GenMnemonicTables",
     ":X86GenRegisterInfo",
     ":X86GenSubtargetInfo",
   ]
@@ -66,6 +76,7 @@ static_library("MCTargetDesc") {
     "X86MCCodeEmitter.cpp",
     "X86MCTargetDesc.cpp",
     "X86MachObjectWriter.cpp",
+    "X86MnemonicTables.cpp",
     "X86ShuffleDecode.cpp",
     "X86WinCOFFObjectWriter.cpp",
     "X86WinCOFFStreamer.cpp",