[PATCH] D116072: [X86] GLC: Break false dependency for dest register for several instructions.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


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Comment at: llvm/lib/Target/X86/X86.td:999
   list<SubtargetFeature> ADLFeatures =
     !listconcat(TRMFeatures, ADLAdditionalFeatures);
 
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gpei wrote:
> RKSimon wrote:
> > Out of interest - why is Alderlake defined with the atom core intel defs? I realise its big-little, but I'd still count it as a mainstream core and not an embedded budget core.
> Sorry, I have no ideas, maybe it's caused by HW limitations.
> Out of interest - why is Alderlake defined with the atom core intel defs? I realise its big-little, but I'd still count it as a mainstream core and not an embedded budget core.

The big-small core share the same ISA. I think Alderlake miss some features that previous generation of client CPU has. I notice Alderlake miss FeatureVP2INTERSECT which is introduced in tigerlake. We can add features with !listconcat(features1, features2), but it may not easy to exclude a feature from a CPU feature list.


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  https://reviews.llvm.org/D116072/new/

https://reviews.llvm.org/D116072