[PATCH] D121898: [Verifier] Verify parameter alignment.

[Kan Shengchen via Phabricator via llvm-commits]

skan added inline comments.


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Comment at: llvm/lib/IR/Verifier.cpp:1742
+      Align AttrAlign = Attr.getAlignment().valueOrOne();
+      // ArgFlagsTy::MemAlign only have 4 bits for alignment, so the
+      // alignment size should not exceed 1 << 14, otherwise it can NOT
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A question: why is the max alignment is not 1<<15 if we have 4 bits?


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Comment at: llvm/lib/IR/Verifier.cpp:3163
+    // be properly lowered.
+    Align MaxAlign(1 << 15);
+    Assert(ABIAlign < MaxAlign,
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This is a little weird. We hard-code the max number by the width of a bit field...


Repository:
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  https://reviews.llvm.org/D121898/new/

https://reviews.llvm.org/D121898