[PATCH] D121770: [AMDGPU] Select buffer_atomic_cmpswap* in tblgen

Abinav Puthan Purayil via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 17 10:49:44 PDT 2022


abinavpp added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir:537
     ; GFX6-NEXT: [[BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN:%[0-9]+]]:vreg_64 = BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN [[REG_SEQUENCE]], [[COPY]], [[REG_SEQUENCE2]], 0, 0, 1, implicit $exec :: (load store seq_cst (s32), addrspace 1)
-    ; GFX6-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN]].sub0
+    ; GFX6-NEXT: [[COPY3:%[0-9]+]]:av_32 = COPY [[BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN]].sub0
     ; GFX7-LABEL: name: amdgpu_atomic_cmpxchg_s32_global_nortn
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cdevadas wrote:
> Surprised to see the AV class for gfx6, gfx7 where we don't have AGPRs at all. Also, we don't select AV classes during selection. 
> They are made allocatable for better handling the spills during regalloc.
Oops. I haven't looked into how these are selected yet.  D121933 can fix this, but I'm not sure if there's a better way.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121770/new/

https://reviews.llvm.org/D121770



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