[PATCH] D121929: [AArch64] Mark all instructions that read/write FPCR as doing so

[John Brawn via Phabricator via llvm-commits]

john.brawn created this revision.
john.brawn added reviewers: ssijaric, simon_tatham, c-rhodes, SjoerdMeijer.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
john.brawn requested review of this revision.
Herald added a project: LLVM.

All instructions that can raise fp exceptions also read FPCR, with the only other instructions that interact with it being the MSR/MRS to write/read FPCR.

Introducing an FPCR register also requires fixing an assumption in invalidateWindowsRegisterPairing in AArch64FrameLowering.cpp that the enum value of AArch64::LR is one greater than that of AArch64::FP,
which it no longer is due to the registers being arranged in alphabetical order.

This change unfortunately means a large number of mir tests need to be adjusted due to instructions now requiring an implicit fpcr operand to be present.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121929

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.td
  llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
  llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-frint-nofp16.mir
  llvm/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
  llvm/test/CodeGen/AArch64/early-ifcvt-regclass-mismatch.mir
  llvm/test/CodeGen/AArch64/machine-combiner-fmul-dup.mir
  llvm/test/CodeGen/AArch64/machine-combiner-instr-fmf.mir
  llvm/test/CodeGen/AArch64/machine-combiner-reassociate.mir
  llvm/test/CodeGen/AArch64/machine-combiner.mir
  llvm/test/CodeGen/AArch64/misched-predicate-virtreg.mir
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir
  llvm/test/CodeGen/AArch64/strict-fp-opt.ll
  llvm/test/CodeGen/AArch64/taildup-inst-dup-loc.mir
  llvm/test/CodeGen/AArch64/wineh-frame1.mir
  llvm/test/CodeGen/AArch64/wineh-frame2.mir
  llvm/test/CodeGen/AArch64/wineh-frame4.mir
  llvm/test/CodeGen/AArch64/wineh2.mir
  llvm/test/CodeGen/AArch64/wineh3.mir
  llvm/test/CodeGen/AArch64/wineh4.mir
  llvm/test/CodeGen/AArch64/wineh8.mir
  llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D121929.416209.patch
Type: text/x-patch
Size: 78784 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220317/05944016/attachment-0001.bin>