[PATCH] D120648: [DAGCombine] fold (bswap(srl (bswap c), 8*x)) -> (shl c, 8*x)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:9729-9730
+  if (N0->getOpcode() == ISD::SRL && N0.hasOneUse()) {
+    auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1));
+    if (ShAmt && ShAmt->getZExtValue() % 8 == 0) {
+      SDValue BSwap = N0->getOperand(0);
----------------
lebedev.ri wrote:
> Chenbing.Zheng wrote:
> > lebedev.ri wrote:
> > > I'm guessing it isn't worth it to instead check with the knownbits that low 3 bits are zeros?
> > It seems that x % 8 == 0 is simple and clear.
> > It seems that x % 8 == 0 is simple and clear.
> 
> Sure, but does it handle variable shift amounts?
It would also add vector support, which probably isn't that relevant but could maybe turn up.


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  https://reviews.llvm.org/D120648/new/

https://reviews.llvm.org/D120648