[PATCH] D121914: [AMDGPU] Stop using getMinimalPhysRegClass in LowerFormalArguments

Joe Nash via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 17 08:02:09 PDT 2022


Joe_Nash added a comment.

I think a switch case over known RegClasses that we want to use is the way to go. The only question is do we need to handle more cases. Is this passing testing? When I put assert(VT.getSizeInBits() == 32) here I get massive test failures. So what happens to wider types, they all become VGPR_32?


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https://reviews.llvm.org/D121914



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