[PATCH] D121914: [AMDGPU] Stop using getMinimalPhysRegClass in LowerFormalArguments

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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NFCI. The motivation for this is avoid problems in future if we add new
classes containing only a subset of all VGPRs, or a subset of all SGPRs.
getMinimalPhysRegClass would favour these smaller classes, which is not
what we want here.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121914

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2548,7 +2548,9 @@
     assert(VA.isRegLoc() && "Parameter must be in a register!");
 
     Register Reg = VA.getLocReg();
-    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
+    const TargetRegisterClass *RC = AMDGPU::SGPR_32RegClass.contains(Reg)
+                                        ? &AMDGPU::SGPR_32RegClass
+                                        : &AMDGPU::VGPR_32RegClass;
     EVT ValVT = VA.getValVT();
 
     Reg = MF.addLiveIn(Reg, RC);


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