[PATCH] D120428: [AArch64] Optimize safe integer division

Thu Mar 17 05:46:12 PDT 2022

Kmeakin added inline comments.
Herald added a project: All.

================
Comment at: llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:325
+  auto *RhsDef = MRI->getUniqueVRegDef(RhsReg);
+  auto *FlagsDef = MRI->getUniqueVRegDef(FlagsReg);
+
----------------
dmgreen wrote:
> Kmeakin wrote:
> > dmgreen wrote:
> > > Isn't FlagsReg AArch64::NZCV? How does that work with getUniqueVRegDef?
> > `FlagsReg` is indeed `NZCV`, but it is updated by flag-setting instructions (eg `SUBS`), so `getUniqueVRegDef` will return the instruction that sets the flags. 
> Sure, but it's a physical register, not a vreg. Which was why I was surprised it worked. I was surprised it didn't assert that the register was virtual.
> 
> Does it work if there are multiple instructions defining nzcv in the function?
No, it does not work if there are multiple definitions of NZCV. As far as I can tell, it is not possible to get the correct defining instruction for NZCV if it is defined by multiple instructions. 

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  https://reviews.llvm.org/D120428/new/

https://reviews.llvm.org/D120428