[PATCH] D121874: [AMDGPU] Fix PreRARematerialize scheduler pass sinking undef instruction

Vang Thao via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 16 17:58:13 PDT 2022


vangthao created this revision.
Herald added subscribers: foad, kerbowa, javed.absar, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl, arsenm.
Herald added a project: All.
vangthao requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

When collecting trivially rematerializable defs, skip undefs that are defining parts of a subreg. We do not want to sink these.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121874

Files:
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
  llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D121874.416038.patch
Type: text/x-patch
Size: 8680 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220317/6319531d/attachment.bin>


More information about the llvm-commits mailing list