[llvm] 09a2b5b - [AArch64] Regenerate and extend peephole-and-tst.ll tests. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 16 02:44:24 PDT 2022
Author: David Green
Date: 2022-03-16T09:44:20Z
New Revision: 09a2b5b5062c864e9508d398a56c4192d1b7388d
URL: https://github.com/llvm/llvm-project/commit/09a2b5b5062c864e9508d398a56c4192d1b7388d
DIFF: https://github.com/llvm/llvm-project/commit/09a2b5b5062c864e9508d398a56c4192d1b7388d.diff
LOG: [AArch64] Regenerate and extend peephole-and-tst.ll tests. NFC
Added:
Modified:
llvm/test/CodeGen/AArch64/peephole-and-tst.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/peephole-and-tst.ll b/llvm/test/CodeGen/AArch64/peephole-and-tst.ll
index 4feee1f4fdfb3..696933b996a19 100644
--- a/llvm/test/CodeGen/AArch64/peephole-and-tst.ll
+++ b/llvm/test/CodeGen/AArch64/peephole-and-tst.ll
@@ -1,10 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
%struct.anon = type { i32*, i32* }
- at ptr_wrapper = common dso_local local_unnamed_addr global %struct.anon* null, align 8
+ at ptr_wrapper = common global %struct.anon* null, align 8
-define dso_local i32 @test_func_i32_two_uses(i32 %in, i32 %bit, i32 %mask) local_unnamed_addr {
+define i32 @test_func_i32_two_uses(i32 %in, i32 %bit, i32 %mask) {
+; CHECK-LABEL: test_func_i32_two_uses:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: adrp x9, :got:ptr_wrapper
+; CHECK-NEXT: mov w8, w0
+; CHECK-NEXT: mov w0, wzr
+; CHECK-NEXT: ldr x9, [x9, :got_lo12:ptr_wrapper]
+; CHECK-NEXT: ldr x9, [x9]
+; CHECK-NEXT: b .LBB0_3
+; CHECK-NEXT: .LBB0_1: // in Loop: Header=BB0_3 Depth=1
+; CHECK-NEXT: str xzr, [x9, #8]
+; CHECK-NEXT: .LBB0_2: // in Loop: Header=BB0_3 Depth=1
+; CHECK-NEXT: lsl w1, w1, #1
+; CHECK-NEXT: cbz w1, .LBB0_6
+; CHECK-NEXT: .LBB0_3: // %do.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ands w10, w1, w8
+; CHECK-NEXT: and w11, w2, w8
+; CHECK-NEXT: cinc w0, w0, ne
+; CHECK-NEXT: cmp w10, w11
+; CHECK-NEXT: b.eq .LBB0_1
+; CHECK-NEXT: // %bb.4: // %do.body
+; CHECK-NEXT: // in Loop: Header=BB0_3 Depth=1
+; CHECK-NEXT: cbnz w2, .LBB0_1
+; CHECK-NEXT: // %bb.5: // %do.body
+; CHECK-NEXT: // in Loop: Header=BB0_3 Depth=1
+; CHECK-NEXT: cbz w10, .LBB0_2
+; CHECK-NEXT: b .LBB0_1
+; CHECK-NEXT: .LBB0_6: // %do.end
+; CHECK-NEXT: ret
entry:
%0 = load %struct.anon*, %struct.anon** @ptr_wrapper, align 8
%result = getelementptr inbounds %struct.anon, %struct.anon* %0, i64 0, i32 1
@@ -12,12 +42,6 @@ entry:
br label %do.body
do.body: ; preds = %4, %entry
-; CHECK-LABEL: test_func_i32_two_uses:
-; CHECK: ands [[DSTREG:w[0-9]+]]
-; Usage #1
-; CHECK: cmp [[DSTREG]]
-; Usage #2
-; CHECK: cbz [[DSTREG]]
%bit.addr.0 = phi i32 [ %bit, %entry ], [ %shl, %4 ]
%retval1.0 = phi i32 [ 0, %entry ], [ %retval1.1, %4 ]
%and = and i32 %bit.addr.0, %in
@@ -45,7 +69,29 @@ do.end: ; preds = %4
ret i32 %retval1.1
}
-define dso_local i32 @test_func_i64_one_use(i64 %in, i64 %bit, i64 %mask) local_unnamed_addr #0 {
+define i32 @test_func_i64_one_use(i64 %in, i64 %bit, i64 %mask) {
+; CHECK-LABEL: test_func_i64_one_use:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: adrp x9, :got:ptr_wrapper
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, wzr
+; CHECK-NEXT: ldr x9, [x9, :got_lo12:ptr_wrapper]
+; CHECK-NEXT: ldr x9, [x9]
+; CHECK-NEXT: b .LBB1_2
+; CHECK-NEXT: .LBB1_1: // in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT: lsl x1, x1, #1
+; CHECK-NEXT: cbz x1, .LBB1_4
+; CHECK-NEXT: .LBB1_2: // %do.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ands x10, x1, x8
+; CHECK-NEXT: orr x10, x2, x10
+; CHECK-NEXT: cinc w0, w0, ne
+; CHECK-NEXT: cbz x10, .LBB1_1
+; CHECK-NEXT: // %bb.3: // in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT: str xzr, [x9, #8]
+; CHECK-NEXT: b .LBB1_1
+; CHECK-NEXT: .LBB1_4: // %do.end
+; CHECK-NEXT: ret
entry:
%0 = load %struct.anon*, %struct.anon** @ptr_wrapper, align 8
%result = getelementptr inbounds %struct.anon, %struct.anon* %0, i64 0, i32 1
@@ -53,9 +99,6 @@ entry:
br label %do.body
do.body: ; preds = %4, %entry
-; CHECK-LABEL: test_func_i64_one_use:
-; CHECK: ands [[DSTREG:x[0-9]+]], [[SRCREG1:x[0-9]+]], [[SRCREG2:x[0-9]+]]
-; CHECK-NEXT: orr [[DSTREG]], [[SRCREG_ORR:x[0-9]+]], [[DSTREG]]
%bit.addr.0 = phi i64 [ %bit, %entry ], [ %shl, %4 ]
%retval1.0 = phi i32 [ 0, %entry ], [ %retval1.1, %4 ]
%and = and i64 %bit.addr.0, %in
@@ -79,3 +122,100 @@ do.body: ; preds = %4, %entry
do.end: ; preds = %4
ret i32 %retval1.1
}
+
+define i64 @test_and1(i64 %x, i64 %y) {
+; CHECK-LABEL: test_and1:
+; CHECK: // %bb.0:
+; CHECK-NEXT: and x8, x0, #0x3
+; CHECK-NEXT: tst x0, #0x3
+; CHECK-NEXT: csel x0, x8, x1, eq
+; CHECK-NEXT: ret
+ %a = and i64 %x, 3
+ %c = icmp eq i64 %a, 0
+ %s = select i1 %c, i64 %a, i64 %y
+ ret i64 %s
+}
+
+define i64 @test_and2(i64 %x, i64 %y) {
+; CHECK-LABEL: test_and2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tst x0, #0x3
+; CHECK-NEXT: csel x0, x0, x1, eq
+; CHECK-NEXT: ret
+ %a = and i64 %x, 3
+ %c = icmp eq i64 %a, 0
+ %s = select i1 %c, i64 %x, i64 %y
+ ret i64 %s
+}
+
+define i64 @test_and3(i64 %x, i64 %y) {
+; CHECK-LABEL: test_and3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 32
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w20, -16
+; CHECK-NEXT: .cfi_offset w21, -24
+; CHECK-NEXT: .cfi_offset w30, -32
+; CHECK-NEXT: mov x20, x0
+; CHECK-NEXT: and x21, x0, #0x3
+; CHECK-NEXT: mov x0, xzr
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: bl callee
+; CHECK-NEXT: tst x20, #0x3
+; CHECK-NEXT: csel x0, x21, x19, eq
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
+; CHECK-NEXT: ret
+ %a = and i64 %x, 3
+ %b = call i64 @callee(i64 0)
+ %c = icmp eq i64 %a, 0
+ %s = select i1 %c, i64 %a, i64 %y
+ ret i64 %s
+}
+
+define i64 @test_and_4(i64 %x, i64 %y) {
+; CHECK-LABEL: test_and_4:
+; CHECK: // %bb.0:
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: mov x19, x0
+; CHECK-NEXT: ands x0, x0, #0x3
+; CHECK-NEXT: bl callee
+; CHECK-NEXT: tst x19, #0x3
+; CHECK-NEXT: and x8, x19, #0x3
+; CHECK-NEXT: csel x0, x8, x0, eq
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ret
+ %a = and i64 %x, 3
+ %b = call i64 @callee(i64 %a)
+ %c = icmp eq i64 %a, 0
+ %s = select i1 %c, i64 %a, i64 %b
+ ret i64 %s
+}
+
+define i64 @test_add(i64 %x, i64 %y) {
+; CHECK-LABEL: test_add:
+; CHECK: // %bb.0:
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: add x19, x0, #3
+; CHECK-NEXT: mov x0, xzr
+; CHECK-NEXT: bl callee
+; CHECK-NEXT: cmp x19, #0
+; CHECK-NEXT: csel x0, x19, x0, eq
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ret
+ %a = add i64 %x, 3
+ %b = call i64 @callee(i64 0)
+ %c = icmp eq i64 %a, 0
+ %s = select i1 %c, i64 %a, i64 %b
+ ret i64 %s
+}
+
+declare i64 @callee(i64)
More information about the llvm-commits
mailing list