[PATCH] D121654: [RISCV] Ensure PseudoLA* can be hoisted

Tue Mar 15 20:47:17 PDT 2022

jrtc27 added inline comments.

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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:3762
+        MachineMemOperand::MOLoad | MachineMemOperand::MODereferenceable |
+            MachineMemOperand::MOInvariant,
+        LLT(Ty.getSimpleVT()), Align(Ty.getFixedSizeInBits() / 8));
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MaskRay wrote:
> Is it possible to construct a test that will compile to inferior assembly if `MOInvariant` is unset?
I just copied what AMDGPU did. Other backends seem to bother less with all the attributes, I suspect they don't really matter even though technically correct.

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Comment at: llvm/test/CodeGen/RISCV/machinelicm-got.ll:1
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \
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MaskRay wrote:
> machinelicm-got.ll may not be the best name. I think it makes sense to place non-GOT tests in this file. For example `test_lla` doesn't use got. 
Yeah, originally it was just a PseudoLA test but then I later added PseudoLA_TLS_* and figured I should add PseudoLLA for completeness to show that one was already fine. Now renamed.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121654/new/

https://reviews.llvm.org/D121654