[PATCH] D121708: [X86] Fix AMD Znver3 model checks

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 15 08:32:33 PDT 2022


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While `-march=` is correctly detected as `znver3` for the cpu,
apparently the model check is incorrect:

  $ lscpu 
  Architecture:            x86_64
    CPU op-mode(s):        32-bit, 64-bit
    Address sizes:         48 bits physical, 48 bits virtual
    Byte Order:            Little Endian
  CPU(s):                  32
    On-line CPU(s) list:   0-31
  Vendor ID:               AuthenticAMD
    Model name:            AMD Ryzen 9 5950X 16-Core Processor
      CPU family:          25
      Model:               33
      Thread(s) per core:  2
      Core(s) per socket:  16
      Socket(s):           1
      Stepping:            0
      Frequency boost:     disabled
      CPU max MHz:         6017.8462
      CPU min MHz:         2200.0000
      BogoMIPS:            8050.07
      Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse
                           3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_p
                           state ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbn
                           oinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
  Virtualization features: 
    Virtualization:        AMD-V
  Caches (sum of all):     
    L1d:                   512 KiB (16 instances)
    L1i:                   512 KiB (16 instances)
    L2:                    8 MiB (16 instances)
    L3:                    64 MiB (2 instances)
  NUMA:                    
    NUMA node(s):          1
    NUMA node0 CPU(s):     0-31
  Vulnerabilities:         
    Itlb multihit:         Not affected
    L1tf:                  Not affected
    Mds:                   Not affected
    Meltdown:              Not affected
    Spec store bypass:     Mitigation; Speculative Store Bypass disabled via prctl
    Spectre v1:            Mitigation; usercopy/swapgs barriers and __user pointer sanitization
    Spectre v2:            Mitigation; Retpolines, IBPB conditional, IBRS_FW, STIBP always-on, RSB filling
    Srbds:                 Not affected
    Tsx async abort:       Not affected

Model is 33 (0x21), while the code was expecting it to be `0x00 .. 0x1F`.
https://github.com/torvalds/linux/blob/v5.17-rc8/drivers/hwmon/k10temp.c#L432-L453 agrees.
I'm not sure if other ranges listed here should also be accepted.

I noticed this while implementing CPU model detection for halide.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121708

Files:
  compiler-rt/lib/builtins/cpu_model.c
  llvm/lib/Support/Host.cpp


Index: llvm/lib/Support/Host.cpp
===================================================================
--- llvm/lib/Support/Host.cpp
+++ llvm/lib/Support/Host.cpp
@@ -1029,7 +1029,7 @@
   case 25:
     CPU = "znver3";
     *Type = X86::AMDFAM19H;
-    if (Model <= 0x0f) {
+    if (Model <= 0x0f || Model == 0x21) {
       *Subtype = X86::AMDFAM19H_ZNVER3;
       break; // 00h-0Fh: Zen3
     }
Index: compiler-rt/lib/builtins/cpu_model.c
===================================================================
--- compiler-rt/lib/builtins/cpu_model.c
+++ compiler-rt/lib/builtins/cpu_model.c
@@ -579,9 +579,9 @@
   case 25:
     CPU = "znver3";
     *Type = AMDFAM19H;
-    if (Model <= 0x0f) {
+    if (Model <= 0x0f || Model == 0x21) {
       *Subtype = AMDFAM19H_ZNVER3;
-      break; // 00h-0Fh: Zen3
+      break; // 00h-0Fh, 21h: Zen3
     }
     break;
   default:


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