[PATCH] D56214: AggressiveInstCombine: Fold full mul i64 x i64 -> i128

Mon Mar 14 11:40:10 PDT 2022

chfast added a comment.

In D56214#3377947 <https://reviews.llvm.org/D56214#3377947>, @RKSimon wrote:

> @chfast What happened to this patch? I was looking at https://llvm.org/PR36243 and wondering if it'd be worth AggressiveInstCombine/InstCombine doing something similar for adds (in that case a 3 chain add i32 to add i96).

I don't remember correctly, but I think I have not received clear answer this is worth the complexity.

On the technical level, we should pick a cut-off point. So it may be ok to do the transformation for i128 given i64 is native type (based on data layout?).

So in the addc case I don't think it make sense to match i96 given the biggest native type is i32. Otherwise, you will be matching a lot of integer multi-precision code and move the work to legalization.

In my practice, LLVM handles multi-precision workloads without builtins pretty good as of recently. However, I'm missing generic addc/subc intrinsic (__builtin_addc is implemented by two uaddos).

Repository:
  rL LLVM

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  https://reviews.llvm.org/D56214/new/

https://reviews.llvm.org/D56214