[llvm] a44aeab - [RISCV] Add MIR tests exposing missed InstAliases
Fraser Cormack via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 14 11:04:23 PDT 2022
Author: Fraser Cormack
Date: 2022-03-14T17:53:07Z
New Revision: a44aeab5261eceead4111b263adf79934c784754
URL: https://github.com/llvm/llvm-project/commit/a44aeab5261eceead4111b263adf79934c784754
DIFF: https://github.com/llvm/llvm-project/commit/a44aeab5261eceead4111b263adf79934c784754.diff
LOG: [RISCV] Add MIR tests exposing missed InstAliases
The InstAlias framework cannot match registers against zero_reg, which
RVV uses to encode unmasked operations.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D92228
Added:
llvm/test/CodeGen/RISCV/rvv/aliases.mir
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/rvv/aliases.mir b/llvm/test/CodeGen/RISCV/rvv/aliases.mir
new file mode 100644
index 0000000000000..47b625e111d84
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/aliases.mir
@@ -0,0 +1,62 @@
+# RUN: llc -mtriple riscv32 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
+# RUN: llc -mtriple riscv64 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
+
+# FIXME: These should all use the 'vnot' alias despite some not having mask operands
+--- |
+ define void @vnot_mask_1() {
+ ret void
+ }
+ define void @vnot_mask_2() {
+ ret void
+ }
+ define void @vnot_no_mask_1() {
+ ret void
+ }
+ define void @vnot_no_mask_2() {
+ ret void
+ }
+...
+---
+name: vnot_mask_1
+body: |
+ bb.0:
+ liveins: $v0, $v25
+
+ ; CHECK-LABEL: vnot_mask_1:
+ ; CHECK: vnot.v v25, v25, v0.t
+
+ $v25 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
+...
+---
+name: vnot_mask_2
+body: |
+ bb.0:
+ liveins: $v0, $v25
+
+ ; CHECK-LABEL: vnot_mask_2:
+ ; CHECK: vnot.v v1, v25, v0.t
+
+ $v1 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
+...
+---
+name: vnot_no_mask_1
+body: |
+ bb.0:
+ liveins: $v25
+
+ ; CHECK-LABEL: vnot_no_mask_1:
+ ; CHECK: vxor.vi v25, v25, -1
+
+ $v25 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
+...
+---
+name: vnot_no_mask_2
+body: |
+ bb.0:
+ liveins: $v25
+
+ ; CHECK-LABEL: vnot_no_mask_2:
+ ; CHECK: vxor.vi v1, v25, -1
+
+ $v1 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
+...
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