[PATCH] D92228: [RISCV] Add MIR tests exposing missed InstAliases
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 14 09:34:05 PDT 2022
frasercrmck updated this revision to Diff 415119.
frasercrmck added a comment.
Update +experimental-v to plain ol' +v
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D92228/new/
https://reviews.llvm.org/D92228
Files:
llvm/test/CodeGen/RISCV/rvv/aliases.mir
Index: llvm/test/CodeGen/RISCV/rvv/aliases.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/rvv/aliases.mir
@@ -0,0 +1,62 @@
+# RUN: llc -mtriple riscv32 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
+# RUN: llc -mtriple riscv64 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
+
+# FIXME: These should all use the 'vnot' alias despite some not having mask operands
+--- |
+ define void @vnot_mask_1() {
+ ret void
+ }
+ define void @vnot_mask_2() {
+ ret void
+ }
+ define void @vnot_no_mask_1() {
+ ret void
+ }
+ define void @vnot_no_mask_2() {
+ ret void
+ }
+...
+---
+name: vnot_mask_1
+body: |
+ bb.0:
+ liveins: $v0, $v25
+
+ ; CHECK-LABEL: vnot_mask_1:
+ ; CHECK: vnot.v v25, v25, v0.t
+
+ $v25 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
+...
+---
+name: vnot_mask_2
+body: |
+ bb.0:
+ liveins: $v0, $v25
+
+ ; CHECK-LABEL: vnot_mask_2:
+ ; CHECK: vnot.v v1, v25, v0.t
+
+ $v1 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
+...
+---
+name: vnot_no_mask_1
+body: |
+ bb.0:
+ liveins: $v25
+
+ ; CHECK-LABEL: vnot_no_mask_1:
+ ; CHECK: vxor.vi v25, v25, -1
+
+ $v25 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
+...
+---
+name: vnot_no_mask_2
+body: |
+ bb.0:
+ liveins: $v25
+
+ ; CHECK-LABEL: vnot_no_mask_2:
+ ; CHECK: vxor.vi v1, v25, -1
+
+ $v1 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
+...
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