[PATCH] D121180: [AArch64] Perform last active true vector combine

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14411
+
+  SDValue SetCC = N->getOperand(0);
+  EVT OpVT = SetCC.getValueType();
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Should this have the same `SetCC.getOpcode() == ISD::SETCC` restriction as `performFirstTrueTestVectorCombine` for the same reasons? If not then can you rename the variable.


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  https://reviews.llvm.org/D121180/new/

https://reviews.llvm.org/D121180