[PATCH] D120786: [IRSim] Removing length check so first instruction in module is included

[Andrew Litteken via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0c4bbd293e66: [IRSim] Make sure the first instruction of a block doesn't get missed if it is… (authored by AndrewLitteken).

Changed prior to commit:
  https://reviews.llvm.org/D120786?vs=412599&id=414981#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120786/new/

https://reviews.llvm.org/D120786

Files:
  llvm/lib/Analysis/IRSimilarityIdentifier.cpp
  llvm/test/Transforms/IROutliner/outlining-basic-branches.ll
  llvm/test/Transforms/IROutliner/outlining-first-instruction.ll
  llvm/test/Transforms/IROutliner/outlining-no-return-functions.ll
  llvm/test/Transforms/IROutliner/phi-nodes-simple.ll
  llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp

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