[PATCH] D120622: [AArch64] Use correct calling convention for each vararg
Reid Kleckner via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 10 10:56:15 PST 2022
rnk accepted this revision.
rnk added a comment.
lgtm, thanks!
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:6069
+ for (const CCValAssign &ArgLoc : ArgLocs)
+ if (!ArgLoc.isRegLoc())
+ return false;
----------------
I strongly suspect it would be acceptable to simplify this to `if (!Outs.empty()) return false;`, but I don't want to insist.
================
Comment at: llvm/test/CodeGen/AArch64/darwinpcs-tail.ll:34
+define void @_ZThn8_N1C1fEiiiiiiiiiz(%class.C* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 noundef %9, ...) unnamed_addr #1 align 2 {
+ musttail call void (%class.C*, i32, i32, i32, i32, i32, i32, i32, i32, i32, ...) @_ZN1C1fEiiiiiiiiiz(%class.C* nonnull align 8 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 noundef %9, ...)
+ ret void
----------------
Thanks for testing it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120622/new/
https://reviews.llvm.org/D120622
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