[PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction

[ShihPo Hung via Phabricator via llvm-commits]

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As D113439 <https://reviews.llvm.org/D113439>'s discussion, I would like to propose adding
a roundmode operand to instructions that implicitly use VXRM.
And this would allow us to provide intrinsics that are IntrNoMem and pass down a round mode imm. to the backend which will then be able to change the round mode accordingly.

This patch implements single intrinsic `int.riscv.vaadd.rm` and a naive pass to insert WriteVXRM by iterating through each instruction and check the roundmode operand.
Current implementation conservatively keeps the incoming VXRM value and restores it back before affecting other VXRM users, because the ABI doesn't specify it is preserved or volatile across calls.
It can be improved further if the ABI is updated.

I think both sets of intrinsics (1) and (2) will coexist in the meantime until we all agree to replace (1) with (2)
(1) `int.riscv.vaadd.*`
(2) `int.riscv.vaadd.rm.*


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121376

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCV.h
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
  llvm/lib/Target/RISCV/RISCVSystemOperands.td
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/lib/Target/RISCV/RISCVVXRMRegister.cpp
  llvm/test/CodeGen/RISCV/rvv/roundmode-insert.ll
  llvm/test/CodeGen/RISCV/rvv/roundmode-insert.mir
  llvm/test/CodeGen/RISCV/rvv/vaadd-rm-rv64.ll

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