[PATCH] D120287: [RISCV] Add isel patterns for masked RISCVISD::FMA_VL with RISCVISD::FNEG_VL.

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 accepted this revision.
rogfer01 added a comment.
This revision is now accepted and ready to land.
Herald added a project: All.

>> I fear that adding more custom combined nodes would get unwieldy as they don't scale particularly well: we'd probably want corresponding ones for integer madd/macc, for narrowing operations, etc. They may inhibit theoretical optimizations we can perform on generic VP nodes. But the key word is "theoretical" and so that's just a gut reaction. We do have custom nodes for all of the widening operations, so it's feasible.

Fair point.

> We are already using `srcvalue` to skip VL for splats nodes.

Ah ok. I missed that.

> The other option I can think of is to create a ComplexPattern that takes the Root nodes as an input. The ComplexPattern matching code could find the mask on the root node and make sure it matches the operand the ComplexPattern is used for.

Well unless we have a strong reason to really ensure the two masks match, the patterns are more descriptive.

No objections on my side.


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