[PATCH] D121087: [RISCV][RVV] Add Uses = [FRM] and mayRaiseFPException = true to RVV instructions

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 9 22:41:24 PST 2022


craig.topper added a comment.

In D121087#3371831 <https://reviews.llvm.org/D121087#3371831>, @rogfer01 wrote:

> Hi @arcbbb I may be missing context here
>
> How does this interact with the scalar side of things (`F` and `D` instructions). AFAICT their usage of FRM is still unmodeled, right? I mean for codes that only use vector operations this seems fine but when we mix them with the scalar ones, won't we run into scheduling issues?
>
> Maybe you have planned to land the modelling of FRM for the scalar ones too?

FRM for scalar instructions is modeled. D116694 <https://reviews.llvm.org/D116694>, D116323 <https://reviews.llvm.org/D116323>, D115680 <https://reviews.llvm.org/D115680>, D115555 <https://reviews.llvm.org/D115555> probably some others.


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