[PATCH] D121320: X86ISelDAGToDAG: Transform TEST + MOV64ri to SHR + TEST

Wed Mar 9 15:03:51 PST 2022

MatzeB added inline comments.

================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:5739
       // flag.
       if (CmpVT == MVT::i64 && !isInt<32>(Mask) &&
           onlyUsesZeroFlag(SDValue(Node, 0))) {
----------------
craig.topper wrote:
> Is this code already doing something similar? Sanjay had another patch to this code D121147 recently.
Interesting. I believe this case covers only the cases where the mask covers the highest bit in the register and so allows us to get rid of the `test` completely, while my case covers cases of the mask being "in-between" and not covering the highest bit so we still need the `test`...

That said let me dig deeper whether there is code to be shared/reorganized/merged...

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121320/new/

https://reviews.llvm.org/D121320