[PATCH] D121242: [AMDGPU] gfx940 memory model
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 9 04:49:25 PST 2022
foad added inline comments.
================
Comment at: llvm/docs/AMDGPUUsage.rst:8673
+.. _amdgpu-amdhsa-memory-model-gfx940:
+
----------------
I don't know how to review 2500 lines of text. How is it different from GFX90A?
================
Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1486
+
+ /// Other address spaces do not hava a cache.
+
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Typo "hava"
================
Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1527
+
+ /// Other address spaces do not hava a cache.
+
----------------
Typo "hava"
================
Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1568
+ // be used for cache control.
+ assert(MI->mayLoad() ^ MI->mayStore());
+
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Doesn't really matter but I find `!=` a bit easier to understand than `^` on booleans.
================
Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1574
+ // the nontemporal attribute.
+ assert( Op == SIMemOp::LOAD || Op == SIMemOp::STORE);
+
----------------
Space after `(`
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Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1680
+
+ /// Other address spaces do not hava a cache.
+
----------------
Typo "hava"
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121242/new/
https://reviews.llvm.org/D121242
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