[llvm] 9119eef - [X86] Add cheapX86FSETCC_SSE helper. NFC.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-03-08T18:06:27Z
New Revision: 9119eefe5fe513f188f8a2b8d5346ac0ce72d3f3

URL: https://github.com/llvm/llvm-project/commit/9119eefe5fe513f188f8a2b8d5346ac0ce72d3f3
DIFF: https://github.com/llvm/llvm-project/commit/9119eefe5fe513f188f8a2b8d5346ac0ce72d3f3.diff

LOG: [X86] Add cheapX86FSETCC_SSE helper. NFC.

Identify FP CondCode that can be performed by a non-AVX SSE CMP op

Pulled out of D121210

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 405ec5d9bcb1a..d58c572a783ff 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23591,6 +23591,11 @@ static SDValue LowerAndToBT(SDValue And, ISD::CondCode CC,
   return DAG.getNode(X86ISD::BT, dl, MVT::i32, Src, BitNo);
 }
 
+// Check if pre-AVX condcode can be performed by a single FCMP op.
+static bool cheapX86FSETCC_SSE(ISD::CondCode SetCCOpcode) {
+  return (SetCCOpcode != ISD::SETONE) && (SetCCOpcode != ISD::SETUEQ);
+}
+
 /// Turns an ISD::CondCode into a value suitable for SSE floating-point mask
 /// CMPs.
 static unsigned translateX86FSETCC(ISD::CondCode SetCCOpcode, SDValue &Op0,
@@ -23858,7 +23863,7 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget &Subtarget,
 
       // In the two cases not handled by SSE compare predicates (SETUEQ/SETONE),
       // emit two comparisons and a logic op to tie them together.
-      if (SSECC >= 8) {
+      if (!cheapX86FSETCC_SSE(Cond)) {
         // LLVM predicate is SETUEQ or SETONE.
         unsigned CC0, CC1;
         unsigned CombineOpc;