[PATCH] D121210: [X86] convertIntLogicToFPLogic - enable fp-logic on pre-AVX targets for supported fp predicates (PR34563)
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 8 06:09:56 PST 2022
pengfei added inline comments.
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:46823-46825
+ // Copy operands as translateX86FSETCC may swap them.
+ SDValue Op00 = N00, Op01 = N01;
+ SDValue Op10 = N10, Op11 = N11;
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What will we do if they are swapped? I don't see we use it else where.
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:46829-46830
+ unsigned SSECC1 = translateX86FSETCC(CC1, Op10, Op11, IsAlwaysSignaling1);
+ if (SSECC0 >= 8 || SSECC1 >= 8)
+ return SDValue();
+ }
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Move the comments on line 46820 here?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D121210/new/
https://reviews.llvm.org/D121210
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