[PATCH] D114652: [AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 7 17:21:18 PST 2022


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1351
+  // does not use CSR list, the clobbering of return address by function calls
+  // (D117243) or otherwise (D120922) is ignored/not seen by the IPRA's register
+  // usage collection. This will ensure save/restore of return address happens
----------------
Referring to phabricator reviews in a comment is weird


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1359
+  if (!MFI->isEntryFunction() &&
+      (FrameInfo.hasCalls() || MRI.isPhysRegModified(RAReg_sub0) ||
+       MRI.isPhysRegModified(RAReg_sub1))) {
----------------
Can just directly check isPhysRegModified(RetAddrReg)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114652/new/

https://reviews.llvm.org/D114652



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