[llvm] c9d496d - [x86] remove unnecessary decorations in test file; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 7 12:14:35 PST 2022
Author: Sanjay Patel
Date: 2022-03-07T15:14:20-05:00
New Revision: c9d496d8a0c50a427169636b4acc40c9b69950b2
URL: https://github.com/llvm/llvm-project/commit/c9d496d8a0c50a427169636b4acc40c9b69950b2
DIFF: https://github.com/llvm/llvm-project/commit/c9d496d8a0c50a427169636b4acc40c9b69950b2.diff
LOG: [x86] remove unnecessary decorations in test file; NFC
Added:
Modified:
llvm/test/CodeGen/X86/cmp.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll
index 9fab66af97f55..810dadc854534 100644
--- a/llvm/test/CodeGen/X86/cmp.ll
+++ b/llvm/test/CodeGen/X86/cmp.ll
@@ -3,7 +3,7 @@
@d = dso_local global i8 0, align 1
-define dso_local i32 @test1(i32 %X, i32* %y) nounwind {
+define i32 @test1(i32 %X, i32* %y) nounwind {
; CHECK-LABEL: test1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpl $0, (%rsi) # encoding: [0x83,0x3e,0x00]
@@ -27,7 +27,7 @@ ReturnBlock:
ret i32 0
}
-define dso_local i32 @test2(i32 %X, i32* %y) nounwind {
+define i32 @test2(i32 %X, i32* %y) nounwind {
; CHECK-LABEL: test2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testl $536870911, (%rsi) # encoding: [0xf7,0x06,0xff,0xff,0xff,0x1f]
@@ -53,7 +53,7 @@ ReturnBlock:
ret i32 0
}
-define dso_local i8 @test2b(i8 %X, i8* %y) nounwind {
+define i8 @test2b(i8 %X, i8* %y) nounwind {
; CHECK-LABEL: test2b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testb $31, (%rsi) # encoding: [0xf6,0x06,0x1f]
@@ -93,18 +93,17 @@ entry:
define i64 @test4(i64 %x) nounwind {
; CHECK-LABEL: test4:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
; CHECK-NEXT: setle %al # encoding: [0x0f,0x9e,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%t = icmp slt i64 %x, 1
%r = zext i1 %t to i64
ret i64 %r
}
-define dso_local i32 @test5(double %A) nounwind {
+define i32 @test5(double %A) nounwind {
; CHECK-LABEL: test5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
@@ -121,9 +120,9 @@ define dso_local i32 @test5(double %A) nounwind {
; CHECK-NEXT: retq # encoding: [0xc3]
; CHECK-NEXT: .LBB5_3: # %bb8
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: jmp foo # TAILCALL
+; CHECK-NEXT: jmp foo at PLT # TAILCALL
; CHECK-NEXT: # encoding: [0xeb,A]
-; CHECK-NEXT: # fixup A - offset: 1, value: foo-1, kind: FK_PCRel_1
+; CHECK-NEXT: # fixup A - offset: 1, value: foo at PLT-1, kind: FK_PCRel_1
entry:
%tmp2 = fcmp ogt double %A, 1.500000e+02
%tmp5 = fcmp ult double %A, 7.500000e+01
@@ -138,9 +137,9 @@ bb12:
ret i32 32
}
-declare dso_local i32 @foo(...)
+declare i32 @foo(...)
-define dso_local i32 @test6() nounwind align 2 {
+define i32 @test6() nounwind align 2 {
; CHECK-LABEL: test6:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpq $0, -{{[0-9]+}}(%rsp) # encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
@@ -166,7 +165,7 @@ F:
ret i32 0
}
-define dso_local i32 @test7(i64 %res) nounwind {
+define i32 @test7(i64 %res) nounwind {
; CHECK-LABEL: test7:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
@@ -179,68 +178,64 @@ entry:
ret i32 %lnot.ext
}
-define dso_local i32 @test8(i64 %res) nounwind {
+define i32 @test8(i64 %res) nounwind {
; CHECK-LABEL: test8:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20]
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: cmpl $3, %edi # encoding: [0x83,0xff,0x03]
; CHECK-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lnot = icmp ult i64 %res, 12884901888
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
-define dso_local i32 @test9(i64 %res) nounwind {
+define i32 @test9(i64 %res) nounwind {
; CHECK-LABEL: test9:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: shrq $33, %rdi # encoding: [0x48,0xc1,0xef,0x21]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lnot = icmp ult i64 %res, 8589934592
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
-define dso_local i32 @test10(i64 %res) nounwind {
+define i32 @test10(i64 %res) nounwind {
; CHECK-LABEL: test10:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20]
; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lnot = icmp uge i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
-define dso_local i32 @test11(i64 %l) nounwind {
+define i32 @test11(i64 %l) nounwind {
; CHECK-LABEL: test11:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: shrq $47, %rdi # encoding: [0x48,0xc1,0xef,0x2f]
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: cmpl $1, %edi # encoding: [0x83,0xff,0x01]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
%conv = zext i1 %cmp to i32
ret i32 %conv
}
-define dso_local i32 @test12() ssp uwtable {
+define i32 @test12() ssp uwtable {
; CHECK-LABEL: test12:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax # encoding: [0x50]
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: callq test12b # encoding: [0xe8,A,A,A,A]
-; CHECK-NEXT: # fixup A - offset: 1, value: test12b-4, kind: reloc_branch_4byte_pcrel
+; CHECK-NEXT: callq test12b at PLT # encoding: [0xe8,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: test12b at PLT-4, kind: FK_PCRel_4
; CHECK-NEXT: testb %al, %al # encoding: [0x84,0xc0]
; CHECK-NEXT: je .LBB12_2 # encoding: [0x74,A]
; CHECK-NEXT: # fixup A - offset: 1, value: .LBB12_2-1, kind: FK_PCRel_1
@@ -266,117 +261,103 @@ F:
ret i32 2
}
-declare dso_local zeroext i1 @test12b()
+declare zeroext i1 @test12b()
-define dso_local i32 @test13(i32 %mask, i32 %base, i32 %intra) {
+define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
; CHECK-LABEL: test13:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: testb $8, %dil # encoding: [0x40,0xf6,0xc7,0x08]
; CHECK-NEXT: cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%and = and i32 %mask, 8
%tobool = icmp ne i32 %and, 0
%cond = select i1 %tobool, i32 %intra, i32 %base
ret i32 %cond
-
}
-define dso_local i32 @test14(i32 %mask, i32 %base, i32 %intra) {
+define i32 @test14(i32 %mask, i32 %base, i32 %intra) {
; CHECK-LABEL: test14:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: shrl $7, %edi # encoding: [0xc1,0xef,0x07]
; CHECK-NEXT: cmovnsl %edx, %eax # encoding: [0x0f,0x49,0xc2]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%s = lshr i32 %mask, 7
%tobool = icmp sgt i32 %s, -1
%cond = select i1 %tobool, i32 %intra, i32 %base
ret i32 %cond
-
}
; PR19964
define zeroext i1 @test15(i32 %bf.load, i32 %n) {
; CHECK-LABEL: test15:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: shrl $16, %edi # encoding: [0xc1,0xef,0x10]
; CHECK-NEXT: sete %cl # encoding: [0x0f,0x94,0xc1]
; CHECK-NEXT: cmpl %esi, %edi # encoding: [0x39,0xf7]
; CHECK-NEXT: setae %al # encoding: [0x0f,0x93,0xc0]
; CHECK-NEXT: orb %cl, %al # encoding: [0x08,0xc8]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%bf.lshr = lshr i32 %bf.load, 16
%cmp2 = icmp eq i32 %bf.lshr, 0
%cmp5 = icmp uge i32 %bf.lshr, %n
%.cmp5 = or i1 %cmp2, %cmp5
ret i1 %.cmp5
-
}
-define dso_local i8 @test16(i16 signext %L) {
-; CHECK-LABEL: test16:
-; CHECK: # %bb.0: # %entry
+define i8 @signbit_i16(i16 signext %L) {
+; CHECK-LABEL: signbit_i16:
+; CHECK: # %bb.0:
; CHECK-NEXT: testw %di, %di # encoding: [0x66,0x85,0xff]
; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lshr = lshr i16 %L, 15
%trunc = trunc i16 %lshr to i8
%not = xor i8 %trunc, 1
ret i8 %not
-
}
-define dso_local i8 @test17(i32 %L) {
-; CHECK-LABEL: test17:
-; CHECK: # %bb.0: # %entry
+define i8 @signbit_i32(i32 %L) {
+; CHECK-LABEL: signbit_i32:
+; CHECK: # %bb.0:
; CHECK-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lshr = lshr i32 %L, 31
%trunc = trunc i32 %lshr to i8
%not = xor i8 %trunc, 1
ret i8 %not
-
}
-define dso_local i8 @test18(i64 %L) {
-; CHECK-LABEL: test18:
-; CHECK: # %bb.0: # %entry
+define i8 @signbit_i64(i64 %L) {
+; CHECK-LABEL: signbit_i64:
+; CHECK: # %bb.0:
; CHECK-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lshr = lshr i64 %L, 63
%trunc = trunc i64 %lshr to i8
%not = xor i8 %trunc, 1
ret i8 %not
-
}
-define zeroext i1 @test19(i32 %L) {
-; CHECK-LABEL: test19:
-; CHECK: # %bb.0: # %entry
+define zeroext i1 @signbit_i32_i1(i32 %L) {
+; CHECK-LABEL: signbit_i32_i1:
+; CHECK: # %bb.0:
; CHECK-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
; CHECK-NEXT: setns %al # encoding: [0x0f,0x99,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%lshr = lshr i32 %L, 31
%trunc = trunc i32 %lshr to i1
%not = xor i1 %trunc, true
ret i1 %not
-
}
; This test failed due to incorrect handling of "shift + icmp" sequence
-define dso_local void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
+define void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
; CHECK-LABEL: test20:
-; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
; CHECK-NEXT: # imm = 0xFFFFFF
@@ -389,7 +370,6 @@ define dso_local void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
; CHECK-NEXT: setne d(%rip) # encoding: [0x0f,0x95,0x05,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%bf.shl = shl i32 %bf.load, 8
%bf.ashr = ashr exact i32 %bf.shl, 8
%tobool4 = icmp ne i32 %bf.ashr, 0
@@ -403,67 +383,57 @@ entry:
%frombool15 = zext i1 %tobool14 to i8
store i8 %frombool15, i8* @d, align 1
ret void
-
}
-define dso_local i32 @test21(i64 %val) {
-; CHECK-LABEL: test21:
-; CHECK: # %bb.0: # %entry
+define i32 @highmask_i64_simplify(i64 %val) {
+; CHECK-LABEL: highmask_i64_simplify:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: shrq $41, %rdi # encoding: [0x48,0xc1,0xef,0x29]
-; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%and = and i64 %val, -2199023255552
- %cmp = icmp ne i64 %and, 0
+ %cmp = icmp ult i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-
}
-; AND-to-SHR transformation is enabled for eq/ne condition codes only.
-define dso_local i32 @test22(i64 %val) {
-; CHECK-LABEL: test22:
-; CHECK: # %bb.0: # %entry
+define i32 @highmask_i64_mask64(i64 %val) {
+; CHECK-LABEL: highmask_i64_mask64:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: shrq $41, %rdi # encoding: [0x48,0xc1,0xef,0x29]
+; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%and = and i64 %val, -2199023255552
- %cmp = icmp ult i64 %and, 0
+ %cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-
}
-define dso_local i32 @test23(i64 %val) {
-; CHECK-LABEL: test23:
-; CHECK: # %bb.0: # %entry
+define i32 @highmask_i64_mask32(i64 %val) {
+; CHECK-LABEL: highmask_i64_mask32:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
; CHECK-NEXT: # imm = 0xFFF00000
; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%and = and i64 %val, -1048576
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-
}
-define dso_local i32 @test24(i64 %val) {
-; CHECK-LABEL: test24:
-; CHECK: # %bb.0: # %entry
+define i32 @lowmask_i64_mask64(i64 %val) {
+; CHECK-LABEL: lowmask_i64_mask64:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; CHECK-NEXT: shlq $16, %rdi # encoding: [0x48,0xc1,0xe7,0x10]
; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
-entry:
%and = and i64 %val, 281474976710655
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-
}
define { i64, i64 } @pr39968(i64, i64, i32) {
@@ -486,7 +456,7 @@ define { i64, i64 } @pr39968(i64, i64, i32) {
; Make sure we use a 32-bit comparison without an extend based on the input
; being pre-sign extended by caller.
-define dso_local i32 @pr42189(i16 signext %c) {
+define i32 @pr42189(i16 signext %c) {
; CHECK-LABEL: pr42189:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpl $32767, %edi # encoding: [0x81,0xff,0xff,0x7f,0x00,0x00]
@@ -494,13 +464,13 @@ define dso_local i32 @pr42189(i16 signext %c) {
; CHECK-NEXT: jne .LBB26_2 # encoding: [0x75,A]
; CHECK-NEXT: # fixup A - offset: 1, value: .LBB26_2-1, kind: FK_PCRel_1
; CHECK-NEXT: # %bb.1: # %if.then
-; CHECK-NEXT: jmp g # TAILCALL
+; CHECK-NEXT: jmp g at PLT # TAILCALL
; CHECK-NEXT: # encoding: [0xeb,A]
-; CHECK-NEXT: # fixup A - offset: 1, value: g-1, kind: FK_PCRel_1
+; CHECK-NEXT: # fixup A - offset: 1, value: g at PLT-1, kind: FK_PCRel_1
; CHECK-NEXT: .LBB26_2: # %if.end
-; CHECK-NEXT: jmp f # TAILCALL
+; CHECK-NEXT: jmp f at PLT # TAILCALL
; CHECK-NEXT: # encoding: [0xeb,A]
-; CHECK-NEXT: # fixup A - offset: 1, value: f-1, kind: FK_PCRel_1
+; CHECK-NEXT: # fixup A - offset: 1, value: f at PLT-1, kind: FK_PCRel_1
entry:
%cmp = icmp eq i16 %c, 32767
br i1 %cmp, label %if.then, label %if.end
@@ -518,7 +488,5 @@ return: ; preds = %if.end, %if.then
ret i32 %retval.0
}
-declare dso_local i32 @g()
-
-declare dso_local i32 @f()
-
+declare i32 @g()
+declare i32 @f()
More information about the llvm-commits
mailing list