[PATCH] D121111: [RISCV] Also sink a splat for the first operand of instructions with vector-scalar cases

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll:3028
 
 ; FIXME: This doesn't match against vadd.vx because our patterns aren't
 ; commutative.
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Drop the FIXME?


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Comment at: llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll:3037
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    vle32.v v9, (a0)
+; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
+; CHECK-NEXT:    vle32.v v8, (a0)
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rogfer01 wrote:
> This is an interesting case!
> 
> By doing this we are increasing the number of `vsetvli`s in the loop from 2 to 3. However we could hoist the first one outside the loop because the state of `vl` and `vtype` right before the latch (`bnez`) is exactly the same.
> 
> I guess we can fix this in a specific change in `RISCVInsertVSETVLI.cpp`
It's got a  regular load mixed with a vp.add. Wouldn't we usually have a vp.load?


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  https://reviews.llvm.org/D121111/new/

https://reviews.llvm.org/D121111