[PATCH] D120912: [AArch64][SVE] Convert gather/scatter with a stride of 2 to contiguous loads/stores

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin updated this revision to Diff 413465.
kmclaughlin marked 5 inline comments as done.
kmclaughlin added a comment.

- Moved the changes to `performMaskedGatherScatterCombine` into a new function, `tryCombineToMaskedLoadStore`.
- Removed the switch statement and use of getSimpleVT(), using if-else statements which check MemVT for supported types instead.
- Removed the restriction that the mask opcode of the gather/scatter is not an extract_subvector.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120912/new/

https://reviews.llvm.org/D120912

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-gather-scatter-to-contiguous.ll

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