[PATCH] D113890: [RISCV] Add new ELF attribute to track reserved registers

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.
Herald added a subscriber: pcwang-thead.
Herald added a project: All.


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Comment at: llvm/include/llvm/MC/MCELFStreamer.h:95
     unsigned Tag;
-    unsigned IntValue;
+    uint64_t IntValue;
     std::string StringValue;
----------------
I would suggest change this into `APInt`, since we might also use more than 64 bits, e.g. vector register.


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Comment at: llvm/test/MC/RISCV/attribute-reserved-regs.s:21
+
+.attribute reserved_registers, { x0, x1, x2, x3, x29-x30, x31 }
+# CHECK: attribute      14, 3758096399
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Do you mind add few more testcase for floating point register or even vector register?


Repository:
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  https://reviews.llvm.org/D113890/new/

https://reviews.llvm.org/D113890