[PATCH] D121023: [AMDGPU] Add v_mov_b64 gfx940 opcode

Mon Mar 7 03:02:52 PST 2022

foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

Looks OK to me. I have never really understood why we have duplicate logic for expanding 64-bit vgpr copies in both copyToPhysReg and expandPostRAPseudo.

================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:1846
+      MI.setDesc(get(AMDGPU::V_MOV_B64_e32));
+      if (!isLiteralConstant(MI, 1) || isUInt<32>(SrcOp.getImm()))
+        break;
----------------
I think the setDesc should logically be inside this "if", but I guess it doesn't make any difference in practice.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121023/new/

https://reviews.llvm.org/D121023