[PATCH] D120887: The [2/2] Fix mangle problem when variable used in inline asm （non-rip for ARR[BaseReg+IndexReg+..]）

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/MC/MCParser/AsmParser.cpp:5990
+      return false;
+  }
+
----------------
xiangzhangllvm wrote:
> efriedma wrote:
> > If I'm understanding correctly, this is trying to detect two adjacent expressions in a specific form, and then transform one of them so they can be concatenated?  This is way too much magic.  If we aren't parsing expressions correctly, please fix the initial parse; don't fudge the expressions afterwards.
> I think you understand a part of it.
> Here the instruction parsing are finished. The Operands info written into AsmStrRewrites[].
> Let me take a example:
> Both follow cases will get same Operands info into AsmStrRewrites[i] (ARR) and AsmStrRewrites[i+1] ([edx+eax*4])
> Case 1: 
> ```
>   mov     eax,ARR[edx+eax*4]
> ```
> Case 2:
> ```
>  mov     eax,ARR ;   call  dword ptr[edx+eax*4]
> ```
> So here code (line 5967-5990) is just to distinguish the 2 case.
> 
> For Case 1, we can not let ARR be a RIP related address, because it already has base reg and index reg. (We can't use 3 regs for a mem address)
> For Case 2, it is no problem let ARR use RIP, the [edx+eax*4] are in another instruction.
I agree with @efriedma and think the use of `:P` is hacky. I wrote an experiment patch which seems more concise D121072.


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  https://reviews.llvm.org/D120887/new/

https://reviews.llvm.org/D120887