[PATCH] D1484: Move memset value into register

Serge Pavlov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Mar 5 22:26:38 PST 2022

Previous message: [PATCH] D1484: Move memset value into register
Next message: [llvm] bd5f124 - [RISCV] Add SimplifyDemandedBits support for FSR/FSL/FSRW/FSLW.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

sepavloff abandoned this revision.
sepavloff added a comment.

In D1484#3362129 <https://reviews.llvm.org/D1484#3362129>, @void wrote:

> @sepavloff, are you still interested in this patch? I've been going through old bugs...

No, this patch is outdated.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D1484/new/

https://reviews.llvm.org/D1484

Previous message: [PATCH] D1484: Move memset value into register
Next message: [llvm] bd5f124 - [RISCV] Add SimplifyDemandedBits support for FSR/FSL/FSRW/FSLW.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list