[PATCH] D121001: [DebugInfo][instr-ref] Accept register-reads after isel in any block

Jeremy Morse via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 4 08:25:26 PST 2022


jmorse created this revision.
jmorse added reviewers: Orlando, StephenTozer.
Herald added a subscriber: hiraditya.
Herald added a project: All.
jmorse requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

When lowering LLVM-IR to instruction referencing stuff, I'd assumed that if a value was defined by a COPY, we could follow the register definitions back to where the value was defined, and build an instruction reference to that instruction. The only scenario I envisioned where that might not happen is function arguments: they're not defined by any instruction. Thus, I baked in some assertions that we could always find the defining instruction for a value, unless it was an argument.

Since the I've discovered:

- Exception handling landing pads,
- Constant physical registers,
- Various IR intrinsics,

all can read arbitrary registers that are never defined. It seems the original assertions were just a bad idea: thus, this patch deletes them.

In all circumstances it's fine to issue a DBG_PHI at a position, that reads the desired register, and this will be handled just fine by the rest of the instruction referencing code. The assertions were only put there to encode my assumptions.

Repro from https://github.com/llvm/llvm-project/issues/54190


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121001

Files:
  llvm/lib/CodeGen/MachineFunction.cpp
  llvm/test/DebugInfo/X86/instr-ref-ir-reg-read.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D121001.413018.patch
Type: text/x-patch
Size: 6412 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220304/53e5deec/attachment.bin>


More information about the llvm-commits mailing list