[PATCH] D120942: [PowerPC] Add support for the canonical version of tlbie
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 4 02:28:51 PST 2022
shchenz added a comment.
I made a search in Power6 ~ Power10 ISAs, the instruction format for `tlbie` is like:
1: Power10/Power9:
tlbie RB,RS,RIC,PRS,R
Extended mnemonic for tlbie:
tlbie RB,RS -> tlbie RB,RS,0,0,0
2: Power7/Power8:
tlbie RB,RS
3: Power6:
tlbie RB,L (L is 1bit as 0 or 1, but it is also an operand).
These formats should all be backward compatible.
So for this patch, can we use different instruction definitions for different Power versions?
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:4628
+ (ins gprc:$RS, gprc:$RB, i32imm:$RIC, i1imm:$PRS, i1imm:$R),
+ "tlbie $RB, $RS, $RIC, $PRS, $R", IIC_SprTLBIE, []>;
----------------
This seems not right. Power7/Power8 does not have 5 operands tlbie? They only support the left one.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D120942/new/
https://reviews.llvm.org/D120942
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