[PATCH] D120865: [AtomicExpand][PowerPC] Fix all-one mask value
Kai Luo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 2 19:08:05 PST 2022
lkail created this revision.
lkail added reviewers: jsji, PowerPC.
Herald added subscribers: shchenz, hiraditya, nemanjai.
Herald added a project: All.
lkail requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
When generating a all-one mask value whose bitwidth is larger than 64, signed extension should be used rather then zero extension.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D120865
Files:
llvm/lib/CodeGen/AtomicExpandPass.cpp
llvm/test/CodeGen/PowerPC/atomics-i128.ll
llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
Index: llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
===================================================================
--- llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
+++ llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
@@ -24,7 +24,7 @@
; CHECK-NEXT: [[TMP4:%.*]] = shl i128 [[HI64]], 64
; CHECK-NEXT: [[VAL64:%.*]] = or i128 [[LO64]], [[TMP4]]
; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i128, i1 } undef, i128 [[VAL64]], 0
-; CHECK-NEXT: [[TMP6:%.*]] = and i128 [[VAL64]], 18446744073709551615
+; CHECK-NEXT: [[TMP6:%.*]] = and i128 [[VAL64]], -1
; CHECK-NEXT: [[SUCCESS:%.*]] = icmp eq i128 [[CMPVAL_SHIFTED]], [[TMP6]]
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i128, i1 } [[TMP5]], i1 [[SUCCESS]], 1
; CHECK-NEXT: [[SUCC:%.*]] = extractvalue { i128, i1 } [[TMP7]], 1
Index: llvm/test/CodeGen/PowerPC/atomics-i128.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/atomics-i128.ll
+++ llvm/test/CodeGen/PowerPC/atomics-i128.ll
@@ -473,8 +473,9 @@
; CHECK-NEXT: stqcx. r8, 0, r3
; CHECK-NEXT: .LBB11_4: # %entry
; CHECK-NEXT: lwsync
-; CHECK-NEXT: xor r3, r5, r9
-; CHECK-NEXT: or r3, r3, r4
+; CHECK-NEXT: xor r3, r4, r8
+; CHECK-NEXT: xor r4, r5, r9
+; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: cntlzd r3, r3
; CHECK-NEXT: rldicl r3, r3, 58, 63
; CHECK-NEXT: blr
Index: llvm/lib/CodeGen/AtomicExpandPass.cpp
===================================================================
--- llvm/lib/CodeGen/AtomicExpandPass.cpp
+++ llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -707,7 +707,7 @@
PMV.AlignedAddr = Addr;
PMV.AlignedAddrAlignment = AddrAlign;
PMV.ShiftAmt = ConstantInt::get(PMV.ValueType, 0);
- PMV.Mask = ConstantInt::get(PMV.ValueType, ~0);
+ PMV.Mask = ConstantInt::get(PMV.ValueType, ~0, /*isSigned*/ true);
return PMV;
}
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