[PATCH] D120863: [BOLT][NFC] Return MCRegister::NoRegister from MCPlusBuilder::getNoRegister()

Maksim Panchenko via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 2 18:34:30 PST 2022


maksfb created this revision.
maksfb added reviewers: yota9, rafauler, Amir, ayermolo.
Herald added a subscriber: pengfei.
Herald added a project: All.
maksfb requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120863

Files:
  bolt/include/bolt/Core/MCPlusBuilder.h
  bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
  bolt/lib/Target/X86/X86MCPlusBuilder.cpp


Index: bolt/lib/Target/X86/X86MCPlusBuilder.cpp
===================================================================
--- bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -3202,8 +3202,6 @@
 
   MCPhysReg getX86R11() const override { return X86::R11; }
 
-  MCPhysReg getNoRegister() const override { return X86::NoRegister; }
-
   MCPhysReg getIntArgRegister(unsigned ArgNo) const override {
     // FIXME: this should depend on the calling convention.
     switch (ArgNo) {
Index: bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
===================================================================
--- bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -204,8 +204,6 @@
     return Inst.getOpcode() == AArch64::BLR;
   }
 
-  MCPhysReg getNoRegister() const override { return AArch64::NoRegister; }
-
   bool hasPCRelOperand(const MCInst &Inst) const override {
     // ADRP is blacklisted and is an exception. Even though it has a
     // PC-relative operand, this operand is not a complete symbol reference
Index: bolt/include/bolt/Core/MCPlusBuilder.h
===================================================================
--- bolt/include/bolt/Core/MCPlusBuilder.h
+++ bolt/include/bolt/Core/MCPlusBuilder.h
@@ -424,8 +424,8 @@
 
   /// Return a register number that is guaranteed to not match with
   /// any real register on the underlying architecture.
-  virtual MCPhysReg getNoRegister() const {
-    llvm_unreachable("not implemented");
+  MCPhysReg getNoRegister() const {
+    return MCRegister::NoRegister;
   }
 
   /// Return a register corresponding to a function integer argument \p ArgNo


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D120863.412588.patch
Type: text/x-patch
Size: 1697 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220303/c5fdaa9e/attachment.bin>


More information about the llvm-commits mailing list